SW/DSView
2
0
Fork 0
forked from Ivasoft/DSView
Code Pull Requests Activity

Warnings fix

Browse Source
This commit is contained in:
DreamSourceLab
2017-05-25 20:23:52 +08:00
parent 83d77b03a5
commit 886b847c21
97 changed files with 444 additions and 939 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
.gitignore vendored
View File

@@ -36,6 +36,7 @@ DSView/ui_*.h
DSView/DSView
DSView/install_manifest.txt
DSView/qrc_DSView.cpp
DSView/qrc_style.cpp
moc_*.cpp
moc_*.cpp_parameters

11
DSView/CMakeLists.txt
View File

@@ -34,7 +34,7 @@ project(DSView)
option(DISABLE_WERROR "Build without -Werror" TRUE)
option(ENABLE_SIGNALS "Build with UNIX signals" TRUE)
option(ENABLE_DECODE "Build with libsigrokdecode" TRUE)
option(ENABLE_DECODE "Build with libsigrokdecode4DSL" TRUE)
option(ENABLE_COTIRE "Enable cotire" FALSE)
option(ENABLE_TESTS "Enable unit tests" FALSE)
option(STATIC_PKGDEPS_LIBS "Statically link to (pkg-config) libraries" FALSE)
@@ -65,7 +65,7 @@ list(APPEND PKGDEPS
"libzip >= 0.10"
)
if(ENABLE_DECODE)
list(APPEND PKGDEPS "libsigrokdecode>=0.3.0")
list(APPEND PKGDEPS "libsigrokdecode4DSL>=0.4.0")
endif()
find_package(PkgConfig)
@@ -148,7 +148,7 @@ set(DSView_SOURCES
pv/view/header.cpp
pv/view/cursor.cpp
pv/view/analogsignal.cpp
pv/prop/binding/binding_deviceoptions.cpp
pv/prop/binding/deviceoptions.cpp
pv/toolbars/trigbar.cpp
pv/toolbars/filebar.cpp
pv/dock/protocoldock.cpp
@@ -267,10 +267,10 @@ set(DSView_FORMS
)
set(DSView_RESOURCES
DSView.qrc
DSView.qrc
darkstyle/style.qrc
)
if(ENABLE_DECODE)
list(APPEND DSView_SOURCES
pv/dock/protocoldock.cpp
@@ -399,7 +399,6 @@ set_target_properties(${PROJECT_NAME} PROPERTIES INSTALL_RPATH "/usr/local/lib")
# Install the executable.
install(TARGETS ${PROJECT_NAME} DESTINATION bin/)
install(DIRECTORY res DESTINATION share/${PROJECT_NAME})
install(DIRECTORY ../libsigrokdecode4DSL/decoders DESTINATION share/${PROJECT_NAME})
install(FILES icons/logo.png DESTINATION share/${PROJECT_NAME} RENAME logo.png)
install(FILES DreamSourceLab.rules DESTINATION /etc/udev/rules.d/)
install(FILES DSView.desktop DESTINATION /usr/share/applications/)

9
DSView/DSView.desktop Normal file
View File

@@ -0,0 +1,9 @@
[Desktop Entry]
Version=0.96
Exec=/usr/local/bin/DSView
Name=DSView
Comment=GUI Program for DreamSourceLab USB-based Instruments
Icon=/usr/local/share/DSView/logo.png
Type=Application
Terminal=false
Categories=Development

2
DSView/main.cpp
View File

@@ -22,7 +22,7 @@
#ifdef ENABLE_DECODE
#include <libsigrokdecode/libsigrokdecode.h> /* First, so we avoid a _POSIX_C_SOURCE warning. */
#include <libsigrokdecode4DSL/libsigrokdecode.h> /* First, so we avoid a _POSIX_C_SOURCE warning. */
#endif
#include <stdint.h>

2
DSView/pv/data/analogsnapshot.cpp
View File

@@ -338,7 +338,7 @@ void AnalogSnapshot::append_payload_to_envelope_levels()
int AnalogSnapshot::get_ch_order(int sig_index)
{
int order = 0;
uint16_t order = 0;
for (auto& iter:_ch_index) {
if (iter == sig_index)
break;

2
DSView/pv/data/decode/annotation.cpp
View File

@@ -20,7 +20,7 @@
*/
extern "C" {
#include <libsigrokdecode/libsigrokdecode.h>
#include <libsigrokdecode4DSL/libsigrokdecode.h>
}
#include <vector>

2
DSView/pv/data/decode/decoder.cpp
View File

@@ -20,7 +20,7 @@
*/
#include <libsigrok4DSL/libsigrok.h>
#include <libsigrokdecode/libsigrokdecode.h>
#include <libsigrokdecode4DSL/libsigrokdecode.h>
#include "decoder.h"

2
DSView/pv/data/decode/row.cpp
View File

@@ -20,7 +20,7 @@
#include "row.h"
#include <libsigrokdecode/libsigrokdecode.h>
#include <libsigrokdecode4DSL/libsigrokdecode.h>
namespace pv {
namespace data {

2
DSView/pv/data/decodermodel.cpp
View File

@@ -18,7 +18,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <libsigrokdecode/libsigrokdecode.h>
#include <libsigrokdecode4DSL/libsigrokdecode.h>
#include <boost/foreach.hpp>
#include <boost/thread/thread.hpp>

12
DSView/pv/data/decoderstack.cpp
View File

@@ -457,18 +457,6 @@ uint64_t DecoderStack::get_max_sample_count() const
return max_sample_count;
}
boost::optional<uint64_t> DecoderStack::wait_for_data() const
{
//unique_lock<mutex> input_lock(_input_mutex);
while(!boost::this_thread::interruption_requested() &&
!_frame_complete && (uint64_t)_samples_decoded >= _sample_count)
//_input_cond.wait(input_lock);
return boost::make_optional(
!boost::this_thread::interruption_requested() &&
((uint64_t)_samples_decoded < _sample_count || !_frame_complete),
_sample_count);
}
void DecoderStack::decode_data(
const uint64_t decode_start, const uint64_t decode_end,
srd_session *const session)

4
DSView/pv/data/decoderstack.h
View File

@@ -21,7 +21,7 @@
#ifndef DSVIEW_PV_DATA_DECODERSTACK_H
#define DSVIEW_PV_DATA_DECODERSTACK_H
#include <libsigrokdecode/libsigrokdecode.h>
#include <libsigrokdecode4DSL/libsigrokdecode.h>
#include <list>
@@ -145,8 +145,6 @@ public:
int64_t get_mark_index() const;
private:
boost::optional<uint64_t> wait_for_data() const;
void decode_data(const uint64_t decode_start, const uint64_t decode_end, srd_session *const session);
void decode_proc();

35
DSView/pv/data/logicsnapshot.cpp
View File

@@ -165,7 +165,7 @@ void LogicSnapshot::first_payload(const sr_datafeed_logic &logic, uint64_t total
sr_channel *const probe = (sr_channel*)l->data;
if (probe->type == SR_CHANNEL_LOGIC && probe->enabled) {
std::vector<struct RootNode> root_vector;
for (int j = 0; j < rootnode_size; j++) {
for (uint64_t j = 0; j < rootnode_size; j++) {
struct RootNode rn;
rn.tog = 0;
rn.value = 0;
@@ -250,11 +250,16 @@ void LogicSnapshot::append_cross_payload(
// bit align
while (((_ch_fraction != 0) || (_byte_fraction != 0)) && (len != 0)) {
uint8_t *dp_tmp = (uint8_t *)_dest_ptr;
uint8_t *sp_tmp = (uint8_t *)_src_ptr;
do {
*(uint8_t *)_dest_ptr++ = *(uint8_t *)_src_ptr++;
//*(uint8_t *)_dest_ptr++ = *(uint8_t *)_src_ptr++;
*dp_tmp++ = *sp_tmp++;
_byte_fraction = (_byte_fraction + 1) % ScaleSize;
len--;
} while ((_byte_fraction != 0) && (len != 0));
_dest_ptr = dp_tmp;
_src_ptr = sp_tmp;
if (_byte_fraction == 0) {
const uint64_t index0 = _ring_sample_count / RootNodeSamples;
const uint64_t index1 = (_ring_sample_count >> LeafBlockPower) % RootScale;
@@ -283,7 +288,7 @@ void LogicSnapshot::append_cross_payload(
uint64_t pre_index0 = _ring_sample_count / RootNodeSamples;
uint64_t pre_index1 = (_ring_sample_count >> LeafBlockPower) % RootScale;
uint64_t pre_offset = (_ring_sample_count % LeafBlockSamples) / Scale;
uint64_t *src_ptr;
uint64_t *src_ptr = NULL;
uint64_t *dest_ptr;
int order = 0;
const uint64_t align_size = len / ScaleSize / _channel_num;
@@ -345,15 +350,20 @@ void LogicSnapshot::append_cross_payload(
uint64_t offset = (_ring_sample_count % LeafBlockSamples) / 8;
_dest_ptr = (uint8_t *)_ch_data[_ch_fraction][index0].lbp[index1] + offset;
uint8_t *dp_tmp = (uint8_t *)_dest_ptr;
uint8_t *sp_tmp = (uint8_t *)_src_ptr;
while(len-- != 0) {
*(uint8_t *)_dest_ptr++ = *(uint8_t *)_src_ptr++;
//*(uint8_t *)_dest_ptr++ = *(uint8_t *)_src_ptr++;
*dp_tmp++ = *sp_tmp++;
if (++_byte_fraction == ScaleSize) {
_ch_fraction = (_ch_fraction + 1) % _channel_num;
_byte_fraction = 0;
_dest_ptr = (uint8_t *)_ch_data[_ch_fraction][index0].lbp[index1] + offset;
//_dest_ptr = (uint8_t *)_ch_data[_ch_fraction][index0].lbp[index1] + offset;
dp_tmp = (uint8_t *)_ch_data[_ch_fraction][index0].lbp[index1] + offset;
}
}
_dest_ptr = (uint8_t *)_dest_ptr + _byte_fraction;
//_dest_ptr = (uint8_t *)_dest_ptr + _byte_fraction;
_dest_ptr = dp_tmp + _byte_fraction;
}
}
@@ -363,7 +373,7 @@ void LogicSnapshot::append_split_payload(
assert(logic.format == LA_SPLIT_DATA);
uint64_t samples = logic.length * 8;
int order = logic.order;
uint16_t order = logic.order;
assert(order < _ch_data.size());
if (_sample_cnt[order] >= _total_sample_count)
@@ -459,9 +469,7 @@ const uint8_t *LogicSnapshot::get_samples(uint64_t start_sample, uint64_t &end_s
int sig_index)
{
//assert(data);
assert(start_sample >= 0);
assert(start_sample < get_sample_count());
assert(end_sample >= 0);
assert(end_sample < get_sample_count());
assert(start_sample <= end_sample);
@@ -530,9 +538,9 @@ bool LogicSnapshot::get_display_edges(std::vector<std::pair<bool, bool> > &edges
bool has_edge = get_nxt_edge(index, last_sample, end, 0, sig_index);
// calc the edge position
int gap = (index / min_length) - pixels_offset;
int64_t gap = (index / min_length) - pixels_offset;
index = max((uint64_t)ceil((floor(index/min_length) + 1) * min_length), index + 1);
while(gap > edges.size() && edges.size() < width)
while(gap > (int64_t)edges.size() && edges.size() < width)
edges.push_back(pair<bool, bool>(false, last_sample));
if (index > end)
@@ -576,7 +584,7 @@ bool LogicSnapshot::get_nxt_edge(
bool edge_hit = false;
// linear search for the next transition on the root level
for (int64_t i = root_index; !edge_hit && (index <= end) && i < _ch_data[order].size(); i++) {
for (int64_t i = root_index; !edge_hit && (index <= end) && i < (int64_t)_ch_data[order].size(); i++) {
uint64_t cur_mask = (~0ULL << root_pos);
do {
uint64_t cur_tog = _ch_data[order][i].tog & cur_mask;
@@ -739,7 +747,6 @@ bool LogicSnapshot::block_pre_edge(uint64_t *lbp, uint64_t &index, bool last_sam
unsigned int level = min_level;
bool fast_forward = true;
bool within_block = true;
const uint64_t last = last_sample ? ~0ULL : 0;
uint64_t block_start = index & ~LeafMask;
@@ -1067,7 +1074,7 @@ uint8_t *LogicSnapshot::get_block_buf(int block_index, int sig_index, bool &samp
int LogicSnapshot::get_ch_order(int sig_index)
{
int order = 0;
uint16_t order = 0;
for (auto& iter:_ch_index) {
if (iter == sig_index)
break;

9
DSView/pv/data/mathstack.cpp
View File

@@ -157,12 +157,13 @@ const std::vector<double> MathStack::get_fft_spectrum() const
return empty;
}
const double MathStack::get_fft_spectrum(uint64_t index) const
double MathStack::get_fft_spectrum(uint64_t index)
{
double ret = -1;
if (_math_state == Stopped && index < _power_spectrum.size())
return _power_spectrum[index];
else
return -1;
ret = _power_spectrum[index];
return ret;
}
void MathStack::calc_fft()

2
DSView/pv/data/mathstack.h
View File

@@ -86,7 +86,7 @@ public:
void set_sample_interval(int interval);
const std::vector<double> get_fft_spectrum() const;
const double get_fft_spectrum(uint64_t index) const;
double get_fft_spectrum(uint64_t index);
void calc_fft();

2
DSView/pv/device/devinst.cpp
View File

@@ -83,7 +83,7 @@ GVariant* DevInst::get_config(const sr_channel *ch, const sr_channel_group *grou
return data;
}
bool DevInst::set_config(const sr_channel *ch, const sr_channel_group *group, int key, GVariant *data)
bool DevInst::set_config(sr_channel *ch, sr_channel_group *group, int key, GVariant *data)
{
assert(_owner);
sr_dev_inst *const sdi = dev_inst();

2
DSView/pv/device/devinst.h
View File

@@ -63,7 +63,7 @@ public:
GVariant* get_config(const sr_channel *ch, const sr_channel_group *group, int key);
bool set_config(const sr_channel *ch, const sr_channel_group *group, int key, GVariant *data);
bool set_config(sr_channel *ch, sr_channel_group *group, int key, GVariant *data);
GVariant* list_config(const sr_channel_group *group, int key);

6
DSView/pv/device/file.cpp
View File

@@ -78,10 +78,12 @@ QJsonArray File::get_decoders()
QJsonArray dec_array;
QJsonParseError error;
if (archive = zip_open(_path.toLocal8Bit().data(), 0, &ret)) {
archive = zip_open(_path.toLocal8Bit().data(), 0, &ret);
if (archive) {
/* read "decoders" */
if (zip_stat(archive, "decoders", 0, &zs) != -1) {
if (dec_file = (char *)g_try_malloc(zs.size)) {
dec_file = (char *)g_try_malloc(zs.size);
if (dec_file) {
zf = zip_fopen_index(archive, zs.index, 0);
zip_fread(zf, dec_file, zs.size);
zip_fclose(zf);

1
DSView/pv/device/inputfile.cpp
View File

@@ -48,6 +48,7 @@ sr_dev_inst* InputFile::dev_inst() const
void InputFile::use(SigSession *owner) throw(QString)
{
(void)owner;
assert(!_input);
// only *.dsl file is valid

2
DSView/pv/dialogs/fftoptions.cpp
View File

@@ -224,7 +224,7 @@ void FftOptions::accept()
mathTrace->get_math_stack()->set_sample_num(_len_combobox->currentData().toULongLong());
mathTrace->get_math_stack()->set_sample_interval(_interval_combobox->currentData().toInt());
mathTrace->get_math_stack()->set_windows_index(_window_combobox->currentData().toInt());
mathTrace->set_view_mode(_view_combobox->currentData().toInt());
mathTrace->set_view_mode(_view_combobox->currentData().toUInt());
//mathTrace->init_zoom();
mathTrace->set_dbv_range(_dbv_combobox->currentData().toInt());
mathTrace->set_enable(_en_checkbox->isChecked());

2
DSView/pv/dialogs/interval.cpp
View File

@@ -27,8 +27,8 @@ namespace pv {
namespace dialogs {
Interval::Interval(SigSession &session, QWidget *parent) :
_session(session),
DSDialog(parent),
_session(session),
_button_box(QDialogButtonBox::Ok,
Qt::Horizontal, this)
{

7
DSView/pv/dock/measuredock.cpp
View File

@@ -445,7 +445,7 @@ void MeasureDock::show_all_coursor()
cursor_dlg.setWindowFlags(Qt::FramelessWindowHint | Qt::Popup | Qt::WindowSystemMenuHint |
Qt::WindowMinimizeButtonHint | Qt::WindowMaximizeButtonHint);
int index = 0;
QHBoxLayout *hlayout;
QHBoxLayout *hlayout = NULL;
QVBoxLayout *vlayout = new QVBoxLayout(&cursor_dlg);
for(std::list<Cursor*>::iterator i = _view.get_cursorList().begin();
i != _view.get_cursorList().end(); i++) {
@@ -634,7 +634,7 @@ void MeasureDock::update_probe_selector(QComboBox *selector)
void MeasureDock::del_cursor()
{
int del_index = 0;
Cursor* cursor;
Cursor* cursor = NULL;
for (QVector <QToolButton *>::const_iterator i = _cursor_del_btn_vec.begin();
i != _cursor_del_btn_vec.end(); i++) {
if ((*i)->isChecked()) {
@@ -648,7 +648,8 @@ void MeasureDock::del_cursor()
del_index++;
}
_view.del_cursor(cursor);
if (cursor)
_view.del_cursor(cursor);
if (_view.get_cursorList().empty())
_view.show_cursors(false);

2
DSView/pv/dock/protocoldock.cpp
View File

@@ -615,7 +615,7 @@ void ProtocolDock::export_table_view()
void ProtocolDock::nav_table_view()
{
uint64_t row_index;
uint64_t row_index = 0;
pv::data::DecoderModel *decoder_model = _session.get_decoder_model();
boost::shared_ptr<pv::data::DecoderStack> decoder_stack = decoder_model->getDecoderStack();
if (decoder_stack) {

2
DSView/pv/dock/protocoldock.h
View File

@@ -23,7 +23,7 @@
#ifndef DSVIEW_PV_PROTOCOLDOCK_H
#define DSVIEW_PV_PROTOCOLDOCK_H
#include <libsigrokdecode/libsigrokdecode.h>
#include <libsigrokdecode4DSL/libsigrokdecode.h>
#include <QDockWidget>
#include <QPushButton>

1
DSView/pv/mainframe.cpp
View File

@@ -120,7 +120,6 @@ MainFrame::MainFrame(DeviceManager &device_manager,
_layout->addWidget(_bottom_right, 2, 2);
connect(&_timer, SIGNAL(timeout()), this, SLOT(unfreezing()));
connect(_mainWindow, SIGNAL(prgRate(int)), this, SLOT(setTaskbarProgress(int)));
//readSettings();
}

4
DSView/pv/mainwindow.cpp
View File

@@ -22,7 +22,7 @@
#ifdef ENABLE_DECODE
#include <libsigrokdecode/libsigrokdecode.h>
#include <libsigrokdecode4DSL/libsigrokdecode.h>
#include "dock/protocoldock.h"
#endif
@@ -819,6 +819,8 @@ bool MainWindow::load_session(QString name)
ss.load_decoders(_protocol_widget, sessionObj["decoder"].toArray());
}
#endif
return true;
}
bool MainWindow::store_session(QString name)

4
DSView/pv/prop/binding/binding.cpp
View File

@@ -80,7 +80,7 @@ QWidget* Binding::get_property_form(QWidget *parent,
}
std::map< boost::shared_ptr<Property>,
GVariant* >& Binding::get_property_value() const
GVariant* > Binding::get_property_value() const
{
std::map < boost::shared_ptr<Property>,
GVariant* > pvalue;
@@ -89,6 +89,8 @@ std::map< boost::shared_ptr<Property>,
assert(p);
pvalue[p] = p->get_value();
}
return pvalue;
}
QString Binding::print_gvariant(GVariant *const gvar)

2
DSView/pv/prop/binding/binding.h
View File

@@ -56,7 +56,7 @@ public:
bool auto_commit = false) const;
std::map< boost::shared_ptr<Property>,
GVariant* >& get_property_value() const;
GVariant* > get_property_value() const;
static QString print_gvariant(GVariant *const gvar);

2
DSView/pv/prop/binding/decoderoptions.cpp
View File

@@ -18,7 +18,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <libsigrokdecode/libsigrokdecode.h>
#include <libsigrokdecode4DSL/libsigrokdecode.h>
#include "decoderoptions.h"

2
DSView/pv/prop/binding/binding_deviceoptions.cpp → DSView/pv/prop/binding/deviceoptions.cpp
View File

@@ -142,7 +142,7 @@ GVariant* DeviceOptions::config_getter(
}
void DeviceOptions::config_setter(
const struct sr_dev_inst *sdi, int key, GVariant* value)
struct sr_dev_inst *sdi, int key, GVariant* value)
{
if (sr_config_set(sdi, NULL, NULL, key, value) != SR_OK)
qDebug() << "WARNING: Failed to set value of sample rate";

2
DSView/pv/prop/binding/deviceoptions.h
View File

@@ -47,7 +47,7 @@ private:
static GVariant* config_getter(
const struct sr_dev_inst *sdi, int key);
static void config_setter(
const struct sr_dev_inst *sdi, int key, GVariant* value);
struct sr_dev_inst *sdi, int key, GVariant* value);
void bind_bool(const QString &name, int key);
void bind_enum(const QString &name, int key,

5
DSView/pv/sigsession.cpp
View File

@@ -21,7 +21,7 @@
*/
#ifdef ENABLE_DECODE
#include <libsigrokdecode/libsigrokdecode.h>
#include <libsigrokdecode4DSL/libsigrokdecode.h>
#endif
#include "sigsession.h"
@@ -861,7 +861,8 @@ void SigSession::feed_in_trigger(const ds_trigger_pos &trigger_pos)
{
_hw_replied = true;
if (_dev_inst->dev_inst()->mode != DSO) {
if (_trigger_flag = (trigger_pos.status & 0x01)) {
_trigger_flag = (trigger_pos.status & 0x01);
if (_trigger_flag) {
_trigger_pos = trigger_pos.real_pos;
receive_trigger(_trigger_pos);
}

32
DSView/pv/storesession.cpp
View File

@@ -219,15 +219,17 @@ void StoreSession::save_proc(shared_ptr<data::Snapshot> snapshot)
}
}
} else {
int ch_type;
int ch_type = -1;
BOOST_FOREACH(const boost::shared_ptr<view::Signal> s, _session.get_signals()) {
ch_type = s->get_type();
break;
}
uint64_t size = snapshot->get_sample_count() * snapshot->get_channel_num();
uint8_t *buf = (uint8_t *)snapshot->get_data();
sr_session_append(_file_name.toLocal8Bit().data(), buf, size,
0, 0, ch_type, 1);
if (ch_type != -1) {
uint64_t size = snapshot->get_sample_count() * snapshot->get_channel_num();
uint8_t *buf = (uint8_t *)snapshot->get_data();
sr_session_append(_file_name.toLocal8Bit().data(), buf, size,
0, 0, ch_type, 1);
}
}
progress_updated();
@@ -276,7 +278,7 @@ QString StoreSession::meta_gen(boost::shared_ptr<data::Snapshot> snapshot)
/* metadata */
fprintf(meta, "capturefile = data\n");
fprintf(meta, "total samples = %llu\n", snapshot->get_sample_count());
fprintf(meta, "total samples = %" PRIu64 "\n", snapshot->get_sample_count());
if (sdi->mode == DSO)
fprintf(meta, "total probes = %d\n", g_slist_length(sdi->channels));
@@ -300,7 +302,7 @@ QString StoreSession::meta_gen(boost::shared_ptr<data::Snapshot> snapshot)
gvar = _session.get_device()->get_config(NULL, NULL, SR_CONF_TIMEBASE);
if (gvar != NULL) {
uint64_t tmp_u64 = g_variant_get_uint64(gvar);
fprintf(meta, "hDiv = %llu\n", tmp_u64);
fprintf(meta, "hDiv = %" PRIu64 "\n", tmp_u64);
g_variant_unref(gvar);
}
gvar = _session.get_device()->get_config(NULL, NULL, SR_CONF_DSO_BITS);
@@ -312,7 +314,7 @@ QString StoreSession::meta_gen(boost::shared_ptr<data::Snapshot> snapshot)
} else if (sdi->mode == LOGIC) {
fprintf(meta, "trigger time = %lld\n", _session.get_trigger_time().toMSecsSinceEpoch());
}
fprintf(meta, "trigger pos = %llu\n", _session.get_trigger_pos());
fprintf(meta, "trigger pos = %" PRIu64 "\n", _session.get_trigger_pos());
probecnt = 1;
for (l = sdi->channels; l; l = l->next) {
@@ -325,19 +327,19 @@ QString StoreSession::meta_gen(boost::shared_ptr<data::Snapshot> snapshot)
if (sdi->mode == DSO) {
fprintf(meta, " enable%d = %d\n", probe->index, probe->enabled);
fprintf(meta, " coupling%d = %d\n", probe->index, probe->coupling);
fprintf(meta, " vDiv%d = %d\n", probe->index, probe->vdiv);
fprintf(meta, " vDiv%d = %" PRIu64 "\n", probe->index, probe->vdiv);
fprintf(meta, " vFactor%d = %d\n", probe->index, probe->vfactor);
fprintf(meta, " vPos%d = %lf\n", probe->index, probe->vpos);
fprintf(meta, " vTrig%d = %d\n", probe->index, probe->trig_value);
if (sr_status_get(sdi, &status, 0, 0) == SR_OK) {
if (probe->index == 0) {
fprintf(meta, " period%d = %llu\n", probe->index, status.ch0_period);
fprintf(meta, " pcnt%d = %lu\n", probe->index, status.ch0_pcnt);
fprintf(meta, " period%d = %" PRIu64 "\n", probe->index, status.ch0_period);
fprintf(meta, " pcnt%d = %" PRIu32 "\n", probe->index, status.ch0_pcnt);
fprintf(meta, " max%d = %d\n", probe->index, status.ch0_max);
fprintf(meta, " min%d = %d\n", probe->index, status.ch0_min);
} else {
fprintf(meta, " period%d = %llu\n", probe->index, status.ch1_period);
fprintf(meta, " pcnt%d = %lu\n", probe->index, status.ch1_pcnt);
fprintf(meta, " period%d = %" PRIu64 "\n", probe->index, status.ch1_period);
fprintf(meta, " pcnt%d = %" PRIu32 "\n", probe->index, status.ch1_pcnt);
fprintf(meta, " max%d = %d\n", probe->index, status.ch1_max);
fprintf(meta, " min%d = %d\n", probe->index, status.ch1_min);
}
@@ -531,7 +533,7 @@ void StoreSession::export_proc(shared_ptr<data::Snapshot> snapshot)
progress_updated();
}
}
} else if (channel_type = SR_CHANNEL_DSO) {
} else if (channel_type == SR_CHANNEL_DSO) {
_unit_count = snapshot->get_sample_count();
unsigned char* datat = (unsigned char*)snapshot->get_data();
GString *data_out;
@@ -844,7 +846,7 @@ void StoreSession::load_decoders(dock::ProtocolDock *widget, QJsonArray dec_arra
double StoreSession::get_double(GVariant *var)
{
double val;
double val = 0;
const GVariantType *const type = g_variant_get_type(var);
assert(type);

2
DSView/pv/storesession.h
View File

@@ -30,7 +30,7 @@
#include <QObject>
#include <libsigrok4DSL/libsigrok.h>
#include <libsigrokdecode/libsigrokdecode.h>
#include <libsigrokdecode4DSL/libsigrokdecode.h>
namespace pv {

2
DSView/pv/toolbars/samplingbar.cpp
View File

@@ -572,7 +572,7 @@ void SamplingBar::update_sample_count_selector()
const uint64_t *elements = NULL;
gsize num_elements;
bool stream_mode = false;
uint64_t hw_depth;
uint64_t hw_depth = 0;
uint64_t sw_depth;
if (_updating_sample_count)

4
DSView/pv/view/decodetrace.cpp
View File

@@ -19,7 +19,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern "C" {
#include <libsigrokdecode/libsigrokdecode.h>
#include <libsigrokdecode4DSL/libsigrokdecode.h>
}
#include <extdef.h>
@@ -495,7 +495,7 @@ void DecodeTrace::draw_annotation(const pv::data::decode::Annotation &a,
if (start > right + DrawPadding || end < left - DrawPadding)
return;
if (_decoder_stack->get_mark_index() == (a.start_sample()+ a.end_sample())/2) {
if (_decoder_stack->get_mark_index() == (int64_t)(a.start_sample()+ a.end_sample())/2) {
p.setPen(Signal::dsBlue);
int xpos = (start+end)/2;
int ypos = get_y()+_totalHeight*0.5 + 1;

2
DSView/pv/view/dsldial.cpp
View File

@@ -137,7 +137,7 @@ uint64_t dslDial::get_value()
return _value[_sel];
}
bool dslDial::set_value(uint64_t value)
void dslDial::set_value(uint64_t value)
{
assert(_value.contains(value));
_sel = _value.indexOf(value, 0);

2
DSView/pv/view/dsldial.h
View File

@@ -53,7 +53,7 @@ public:
// get current value
uint64_t get_value();
bool set_value(uint64_t value);
void set_value(uint64_t value);
// set/get factor
void set_factor(uint64_t factor);

19
DSView/pv/view/dsosignal.cpp
View File

@@ -211,7 +211,6 @@ void DsoSignal::set_enable(bool enable)
set_vDialActive(false);
_dev_inst->set_config(_probe, NULL, SR_CONF_EN_CH,
g_variant_new_boolean(enable));
int ch_num = _view->session().get_ch_num(SR_CHANNEL_DSO);
if (running) {
update_capture();
@@ -425,15 +424,15 @@ bool DsoSignal::load_settings()
GVariant* gvar;
// -- enable
bool enable;
gvar = _dev_inst->get_config(_probe, NULL, SR_CONF_EN_CH);
if (gvar != NULL) {
enable = g_variant_get_boolean(gvar);
g_variant_unref(gvar);
} else {
qDebug() << "ERROR: config_get SR_CONF_EN_CH failed.";
return false;
}
// bool enable;
// gvar = _dev_inst->get_config(_probe, NULL, SR_CONF_EN_CH);
// if (gvar != NULL) {
// enable = g_variant_get_boolean(gvar);
// g_variant_unref(gvar);
// } else {
// qDebug() << "ERROR: config_get SR_CONF_EN_CH failed.";
// return false;
// }
// dso channel bits
gvar = _dev_inst->get_config(NULL, NULL, SR_CONF_DSO_BITS);

4
DSView/pv/view/logicsignal.cpp
View File

@@ -20,7 +20,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <libsigrokdecode/libsigrokdecode.h>
#include <libsigrokdecode4DSL/libsigrokdecode.h>
#include <extdef.h>
@@ -359,7 +359,7 @@ bool LogicSignal::measure(const QPointF &p, uint64_t &index0, uint64_t &index1,
bool LogicSignal::edges(const QPointF &p, uint64_t start, uint64_t &rising, uint64_t &falling) const
{
uint64_t index, end;
uint64_t end;
const float gap = abs(p.y() - get_y());
if (gap < get_totalHeight() * 0.5) {
end = _data->samplerate() * _view->scale() * (_view->offset() + p.x());

2
DSView/pv/view/mathtrace.cpp
View File

@@ -108,7 +108,7 @@ int MathTrace::view_mode() const
return _view_mode;
}
void MathTrace::set_view_mode(int mode)
void MathTrace::set_view_mode(unsigned int mode)
{
assert(mode < sizeof(FFT_ViewMode)/sizeof(FFT_ViewMode[0]));
_view_mode = mode;

2
DSView/pv/view/mathtrace.h
View File

@@ -88,7 +88,7 @@ public:
std::vector<int> get_dbv_ranges();
int view_mode() const;
void set_view_mode(int mode);
void set_view_mode(unsigned int mode);
std::vector<QString> get_view_modes_support();
const boost::shared_ptr<pv::data::MathStack>& get_math_stack() const;

2
DSView/pv/view/ruler.cpp
View File

@@ -646,7 +646,7 @@ void Ruler::hover_point_changed()
update();
}
const double Ruler::get_min_period() const
double Ruler::get_min_period() const
{
return _min_period / MinPeriodScale;
}

2
DSView/pv/view/ruler.h
View File

@@ -75,7 +75,7 @@ public:
void set_grabbed_cursor(TimeMarker* grabbed_marker);
void rel_grabbed_cursor();
const double get_min_period() const;
double get_min_period() const;
private:
void paintEvent(QPaintEvent *event);

12
DSView/pv/view/view.cpp
View File

@@ -81,8 +81,8 @@ View::View(SigSession &session, pv::toolbars::SamplingBar *sampling_bar, QWidget
_preOffset(0),
_updating_scroll(false),
_show_cursors(false),
_hover_point(-1, -1),
_search_hit(false),
_hover_point(-1, -1),
_dso_auto(true)
{
setHorizontalScrollBarPolicy(Qt::ScrollBarAlwaysOn);
@@ -633,7 +633,6 @@ void View::signals_changed()
uint8_t max_height = MaxHeightUnit;
vector< boost::shared_ptr<Trace> > time_traces;
vector< boost::shared_ptr<Trace> > fft_traces;
int bits = 8;
BOOST_FOREACH(const boost::shared_ptr<Trace> t, get_traces(ALL_VIEW)) {
if (_trace_view_map[t->get_type()] == TIME_VIEW)
@@ -977,14 +976,17 @@ uint64_t View::get_cursor_samples(int index)
{
assert(index < (int)_cursorList.size());
uint64_t ret = 0;
int curIndex = 0;
for (list<Cursor*>::iterator i = _cursorList.begin();
i != _cursorList.end(); i++) {
if (index == curIndex) {
return (*i)->index();
ret = (*i)->index();
}
curIndex++;
}
return ret;
}
void View::set_measure_en(int enable)
@@ -1009,9 +1011,9 @@ QRect View::get_view_rect()
BOOST_FOREACH(const boost::shared_ptr<Signal> s, sigs) {
return s->get_view_rect();
}
} else {
return _viewcenter->rect();
}
return _viewcenter->rect();
}
int View::get_view_width()

1
DSView/pv/view/viewport.cpp
View File

@@ -367,7 +367,6 @@ void Viewport::paintProgress(QPainter &p)
p.setBrush((timer_cnt % 3) == 2 ? Trace::dsLightBlue : Trace::dsGray);
p.drawEllipse(cenRightPos, trigger_radius, trigger_radius);
sr_status status;
bool triggered;
if (_view.session().get_capture_status(triggered, captured_progress)){
p.setPen(Trace::dsLightBlue);

2
DSView/pv/widgets/decodergroupbox.cpp
View File

@@ -19,7 +19,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern "C" {
#include <libsigrokdecode/libsigrokdecode.h>
#include <libsigrokdecode4DSL/libsigrokdecode.h>
}
#include "decodergroupbox.h"

2
DSView/pv/widgets/decodermenu.cpp
View File

@@ -19,7 +19,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <libsigrokdecode/libsigrokdecode.h>
#include <libsigrokdecode4DSL/libsigrokdecode.h>
#include "decodermenu.h"
#include <assert.h>

4
DSView/pv/widgets/viewstatus.cpp
View File

@@ -32,8 +32,8 @@ namespace pv {
namespace widgets {
ViewStatus::ViewStatus(SigSession &session, QWidget *parent) :
_session(session),
QWidget(parent)
QWidget(parent),
_session(session)
{
}

BIN
DSView/res/DSCope.bin Executable file → Normal file
View File

Binary file not shown.

BIN
DSView/res/DSCope.fw Executable file → Normal file
View File

Binary file not shown.

0
DSView/res/DSCope1.def.dsc Executable file → Normal file
View File

BIN
DSView/res/DSCope20.bin Executable file → Normal file
View File

Binary file not shown.

BIN
DSView/res/DSCope20.fw Executable file → Normal file
View File

Binary file not shown.

43
DSView/res/DSCopeTest.dsc Normal file
View File

@@ -0,0 +1,43 @@
{
"Device": "DSCope",
"DeviceMode": 1,
"Horizontal trigger position": "0",
"Operation Mode": "Normal",
"Sample count": "1048576",
"Sample rate": "100000000",
"Time base": "10000",
"Trigger channel": "0",
"Trigger hold off": "0",
"Trigger margin": "8",
"Trigger slope": "0",
"Trigger source": "0",
"Version": 2,
"channel": [
{
"colour": "#eeb211",
"coupling": 0,
"enabled": true,
"index": 0,
"name": "0",
"trigValue": 0.50196078431372548,
"type": 10001,
"vdiv": 1000,
"vfactor": 1,
"zeroPos": 0.4
},
{
"colour": "#009925",
"coupling": 0,
"enabled": true,
"index": 1,
"name": "1",
"trigValue": 0.50196078431372548,
"type": 10001,
"vdiv": 1000,
"vfactor": 1,
"zeroPos": 0.6
}
],
"decoder": [
]
}

BIN
DSView/res/DSLogic.fw Executable file → Normal file
View File

Binary file not shown.

2
DSView/res/DSLogic0.def.dsc Executable file → Normal file
View File

@@ -14,7 +14,7 @@
"Trigger slope": "0",
"Trigger source": "0",
"Using Clock Negedge": 0,
"Using External Clock": 0,
"Using External Clock": 1,
"channel": [
{
"colour": "#969696",

0
DSView/res/DSLogic1.def.dsc Executable file → Normal file
View File

0
DSView/res/DSLogic2.def.dsc Executable file → Normal file
View File

BIN
DSView/res/DSLogic33.bin Executable file → Normal file
View File

Binary file not shown.

BIN
DSView/res/DSLogic50.bin Executable file → Normal file
View File

Binary file not shown.

BIN
DSView/res/DSLogicBasic.bin Normal file
View File

Binary file not shown.

BIN
DSView/res/DSLogicBasic.fw Normal file
View File

Binary file not shown.

BIN
DSView/res/DSLogicPlus.bin Normal file
View File

Binary file not shown.

BIN
DSView/res/DSLogicPlus.fw Normal file
View File

Binary file not shown.

BIN
DSView/res/DSLogicPro.bin Executable file → Normal file
View File

Binary file not shown.

BIN
DSView/res/DSLogicPro.fw Executable file → Normal file
View File

Binary file not shown.

20
DSView/res/license.txt Normal file
View File

@@ -0,0 +1,20 @@
Copyright (c) 2017 DreamSourceLab
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be
included in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

5
libsigrok4DSL/session_driver.c
View File

@@ -211,7 +211,10 @@ static int receive_data(int fd, int revents, const struct sr_dev_inst *cb_sdi)
packet.payload = &logic;
logic.length = ret;
logic.format = (vdev->version == 2) ? LA_SPLIT_DATA : LA_CROSS_DATA;
logic.index = probe->index;
if (probe)
logic.index = probe->index;
else
logic.index = 0;
logic.order = vdev->cur_channel;
if (vdev->version == 1) {

12
libsigrokdecode4DSL/Makefile.am
View File

@@ -28,9 +28,9 @@ AM_CPPFLAGS = -DDECODERS_DIR='"$(DECODERS_DIR)"'
# The tests CFLAGS are a superset of the libsigrokdecode CFLAGS.
AM_CFLAGS = $(SRD_EXTRA_CFLAGS) $(SRD_WFLAGS) $(TESTS_CFLAGS)
lib_LTLIBRARIES = libsigrokdecode.la
lib_LTLIBRARIES = libsigrokdecode4DSL.la
libsigrokdecode_la_SOURCES = \
libsigrokdecode4DSL_la_SOURCES = \
srd.c \
session.c \
decoder.c \
@@ -44,15 +44,15 @@ libsigrokdecode_la_SOURCES = \
error.c \
version.c
libsigrokdecode_la_LIBADD = $(SRD_EXTRA_LIBS) $(LIBSIGROKDECODE_LIBS)
libsigrokdecode_la_LDFLAGS = -version-info $(SRD_LIB_VERSION) -no-undefined
libsigrokdecode4DSL_la_LIBADD = $(SRD_EXTRA_LIBS) $(LIBSIGROKDECODE_LIBS)
libsigrokdecode4DSL_la_LDFLAGS = -version-info $(SRD_LIB_VERSION) -no-undefined
pkginclude_HEADERS = libsigrokdecode.h
nodist_pkginclude_HEADERS = version.h
noinst_HEADERS = libsigrokdecode-internal.h
pkgconfigdir = $(libdir)/pkgconfig
pkgconfig_DATA = libsigrokdecode.pc
pkgconfig_DATA = libsigrokdecode4DSL.pc
EXTRA_DIST = Doxyfile HACKING contrib/sigrok-logo-notext.png
@@ -71,7 +71,7 @@ tests_main_SOURCES = \
tests/session.c
tests_main_CPPFLAGS = -DDECODERS_DIR='"$(abs_top_srcdir)/decoders"'
tests_main_LDADD = libsigrokdecode.la $(SRD_EXTRA_LIBS) $(TESTS_LIBS)
tests_main_LDADD = libsigrokdecode4DSL.la $(SRD_EXTRA_LIBS) $(TESTS_LIBS)
MAINTAINERCLEANFILES = ChangeLog

8
libsigrokdecode4DSL/configure.ac
View File

@@ -21,9 +21,9 @@
AC_PREREQ([2.63])
# libsigrokdecode package version number (NOT the same as shared lib version!).
AC_INIT([libsigrokdecode], [0.4.0],
[sigrok-devel@lists.sourceforge.net], [libsigrokdecode],
[http://www.sigrok.org])
AC_INIT([libsigrokdecode4DSL], [0.4.0],
[support@dreamsourcelab.com], [libsigrokdecode4DSL],
[http://www.dreamsourcelab.com])
AC_CONFIG_MACRO_DIR([m4])
AC_CONFIG_AUX_DIR([autostuff])
AC_CONFIG_HEADERS([config.h version.h])
@@ -133,7 +133,7 @@ PKG_CHECK_MODULES([TESTS], [$SRD_PKGLIBS_TESTS glib-2.0 $SRD_PKGLIBS])
srd_glib_version=`$PKG_CONFIG --modversion glib-2.0 2>&AS_MESSAGE_LOG_FD`
AC_CONFIG_FILES([Makefile libsigrokdecode.pc])
AC_CONFIG_FILES([Makefile libsigrokdecode4DSL.pc])
AC_OUTPUT

39
libsigrokdecode4DSL/decoder.c
View File

@@ -156,21 +156,21 @@ static void decoder_free(struct srd_decoder *dec)
if (!dec)
return;
Py_XDECREF(dec->py_dec);
Py_XDECREF(dec->py_mod);
Py_XDECREF(dec->py_dec);
Py_XDECREF(dec->py_mod);
g_slist_free_full(dec->options, &decoder_option_free);
g_slist_free_full(dec->binary, (GDestroyNotify)&g_strfreev);
g_slist_free_full(dec->annotation_rows, &annotation_row_free);
g_slist_free_full(dec->annotations, (GDestroyNotify)&g_strfreev);
g_slist_free_full(dec->opt_channels, &channel_free);
g_slist_free_full(dec->channels, &channel_free);
g_slist_free_full(dec->options, &decoder_option_free);
g_slist_free_full(dec->binary, (GDestroyNotify)&g_strfreev);
g_slist_free_full(dec->annotation_rows, &annotation_row_free);
g_slist_free_full(dec->annotations, (GDestroyNotify)&g_strfreev);
g_slist_free_full(dec->opt_channels, &channel_free);
g_slist_free_full(dec->channels, &channel_free);
g_free(dec->license);
g_free(dec->desc);
g_free(dec->longname);
g_free(dec->name);
g_free(dec->id);
g_free(dec->license);
g_free(dec->desc);
g_free(dec->longname);
g_free(dec->name);
g_free(dec->id);
g_free(dec);
}
@@ -365,7 +365,7 @@ static int get_annotations(struct srd_decoder *dec)
char **annpair;
ssize_t i;
int ann_type = 7;
int j;
unsigned int j;
if (!PyObject_HasAttrString(dec->py_dec, "annotations"))
return SRD_OK;
@@ -636,20 +636,11 @@ SRD_PRIV long srd_decoder_apiver(const struct srd_decoder *d)
*/
SRD_API int srd_decoder_load(const char *module_name)
{
PyObject *py_basedec, *py_method, *py_attr, *py_annlist, *py_ann;
PyObject *py_bin_classes, *py_bin_class, *py_ann_rows, *py_ann_row;
PyObject *py_ann_classes, *py_long;
PyObject *py_basedec;
struct srd_decoder *d;
long apiver;
int is_subclass;
const char *fail_txt;
int ret, i, j;
char **ann, **bin, *ann_row_id, *ann_row_desc;
struct srd_channel *pdch;
GSList *l, *ann_classes;
struct srd_decoder_annotation_row *ann_row;
int ann_type = 7;
int ann_len;
if (!srd_check_init())
return SRD_ERR;

BIN
libsigrokdecode4DSL/decoders/0-spi/.pd.py.swo
View File

Binary file not shown.

BIN
libsigrokdecode4DSL/decoders/0-spi/.pd.py.swp
View File

Binary file not shown.

BIN
libsigrokdecode4DSL/decoders/0-uart/.pd.py.swo
View File

Binary file not shown.

BIN
libsigrokdecode4DSL/decoders/0-uart/.pd.py.swp
View File

Binary file not shown.

BIN
libsigrokdecode4DSL/decoders/1-i2c/.pd.py.swo
View File

Binary file not shown.

BIN
libsigrokdecode4DSL/decoders/1-i2c/.pd.py.swp
View File

Binary file not shown.

6
libsigrokdecode4DSL/decoders/1-i2c/pd.py
View File

@@ -79,8 +79,8 @@ class Decoder(srd.Decoder):
inputs = ['logic']
outputs = ['i2c']
channels = (
{'id': 'scl', 'name': 'SCL', 'desc': 'Serial clock line'},
{'id': 'sda', 'name': 'SDA', 'desc': 'Serial data line'},
{'id': 'scl', 'type': 8, 'name': 'SCL', 'desc': 'Serial clock line'},
{'id': 'sda', 'type': 108, 'name': 'SDA', 'desc': 'Serial data line'},
)
options = (
{'id': 'address_format', 'desc': 'Displayed slave address format',
@@ -94,7 +94,7 @@ class Decoder(srd.Decoder):
('0', 'nack', 'NACK'),
('12', 'read', 'Read'),
('11', 'write', 'Write'),
('108', 'bit', 'Data/address bit'),
('208', 'bit', 'Data/address bit'),
('112', 'address-read', 'Address read'),
('111', 'address-write', 'Address write'),
('110', 'data-read', 'Data read'),

BIN
libsigrokdecode4DSL/decoders/1-spi/.pd.py.swn
View File

Binary file not shown.

BIN
libsigrokdecode4DSL/decoders/1-spi/.pd.py.swo
View File

Binary file not shown.

BIN
libsigrokdecode4DSL/decoders/1-spi/.pd.py.swp
View File

Binary file not shown.

12
libsigrokdecode4DSL/decoders/1-spi/pd.py
View File

@@ -88,12 +88,12 @@ class Decoder(srd.Decoder):
inputs = ['logic']
outputs = ['spi']
channels = (
{'id': 'clk', 'name': 'CLK', 'desc': 'Clock'},
{'id': 'clk', 'type': 0, 'name': 'CLK', 'desc': 'Clock'},
)
optional_channels = (
{'id': 'miso', 'name': 'MISO', 'desc': 'Master in, slave out'},
{'id': 'mosi', 'name': 'MOSI', 'desc': 'Master out, slave in'},
{'id': 'cs', 'name': 'CS#', 'desc': 'Chip-select'},
{'id': 'miso', 'type': 107, 'name': 'MISO', 'desc': 'Master in, slave out'},
{'id': 'mosi', 'type': 109, 'name': 'MOSI', 'desc': 'Master out, slave in'},
{'id': 'cs', 'type': -1, 'name': 'CS#', 'desc': 'Chip-select'},
)
options = (
{'id': 'cs_polarity', 'desc': 'CS# polarity', 'default': 'active-low',
@@ -109,8 +109,8 @@ class Decoder(srd.Decoder):
annotations = (
('106', 'miso-data', 'MISO data'),
('108', 'mosi-data', 'MOSI data'),
('107', 'miso-bits', 'MISO bits'),
('109', 'mosi-bits', 'MOSI bits'),
('207', 'miso-bits', 'MISO bits'),
('209', 'mosi-bits', 'MOSI bits'),
('1000', 'warnings', 'Human-readable warnings'),
)
annotation_rows = (

BIN
libsigrokdecode4DSL/decoders/1-uart/.pd.py.swo
View File

Binary file not shown.

BIN
libsigrokdecode4DSL/decoders/1-uart/.pd.py.swp
View File

Binary file not shown.

4
libsigrokdecode4DSL/decoders/1-uart/pd.py
View File

@@ -78,7 +78,7 @@ class Decoder(srd.Decoder):
inputs = ['logic']
outputs = ['uart']
channels = (
{'id': 'rxtx', 'name': 'RX/TX', 'desc': 'UART transceive line'},
{'id': 'rxtx', 'type': 209, 'name': 'RX/TX', 'desc': 'UART transceive line'},
)
options = (
{'id': 'baudrate', 'desc': 'Baud rate', 'default': 9600},
@@ -104,7 +104,7 @@ class Decoder(srd.Decoder):
('0', 'parity-err', 'parity error bits'),
('1', 'stop', 'stop bits'),
('1000', 'warnings', 'warnings'),
('109', 'data-bits', 'data bits'),
('209', 'data-bits', 'data bits'),
)
annotation_rows = (
('data', 'RX/TX', (0, 1, 2, 3, 4)),

128
libsigrokdecode4DSL/decoders/jtag/pd.py
View File

@@ -3,6 +3,14 @@
##
## Copyright (C) 2012-2015 Uwe Hermann <uwe@hermann-uwe.de>
##
## Version:
## Modified by Shiqiu Nie(369614718@qq.com)
## Date: 2017-01-11
## Descript:
## 1. 2017-01-10 Fixed TDI/TDO data decode, when JTAG TAP run into
## SHIFT-IR/SHIFT-DR status,the first bit is not a valid bit.
## 2. 2017-01-11 Fixed decode when shift only one bit.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
@@ -22,10 +30,8 @@ import sigrokdecode as srd
'''
OUTPUT_PYTHON format:
Packet:
[<ptype>, <pdata>]
<ptype>:
- 'NEW STATE': <pdata> is the new state of the JTAG state machine.
Valid values: 'TEST-LOGIC-RESET', 'RUN-TEST/IDLE', 'SELECT-DR-SCAN',
@@ -36,7 +42,6 @@ Packet:
- 'IR TDO': Bitstring that was clocked out of the IR register.
- 'DR TDI': Bitstring that was clocked into the DR register.
- 'DR TDO': Bitstring that was clocked out of the DR register.
All bitstrings are a list consisting of two items. The first is a sequence
of '1' and '0' characters (the right-most character is the LSB. Example:
'01110001', where 1 is the LSB). The second item is a list of ss/es values
@@ -104,6 +109,8 @@ class Decoder(srd.Decoder):
self.saved_item = None
self.first = True
self.first_bit = True
self.bits_cnt = 0
self.data_ready = False
def start(self):
self.out_python = self.register(srd.OUTPUT_PYTHON)
@@ -179,55 +186,96 @@ class Decoder(srd.Decoder):
# Upon SHIFT-IR/SHIFT-DR collect the current TDI/TDO values.
if self.state.startswith('SHIFT-'):
if self.first_bit:
self.ss_bitstring = self.samplenum
self.first_bit = False
else:
self.putx([16, [str(self.bits_tdi[0])]])
self.putx([17, [str(self.bits_tdo[0])]])
# Use self.samplenum as ES of the previous bit.
self.bits_samplenums_tdi[0][1] = self.samplenum
self.bits_samplenums_tdo[0][1] = self.samplenum
self.bits_tdi.insert(0, tdi)
self.bits_tdo.insert(0, tdo)
#if self.first_bit:
#self.ss_bitstring = self.samplenum
# self.first_bit = False
#else:
if self.bits_cnt > 0:
if self.bits_cnt == 1:
self.ss_bitstring = self.samplenum
if self.bits_cnt > 1:
self.putx([16, [str(self.bits_tdi[0])]])
self.putx([17, [str(self.bits_tdo[0])]])
# Use self.samplenum as ES of the previous bit.
self.bits_samplenums_tdi[0][1] = self.samplenum
self.bits_samplenums_tdo[0][1] = self.samplenum
self.bits_tdi.insert(0, tdi)
self.bits_tdo.insert(0, tdo)
# Use self.samplenum as SS of the current bit.
self.bits_samplenums_tdi.insert(0, [self.samplenum, -1])
self.bits_samplenums_tdo.insert(0, [self.samplenum, -1])
self.bits_cnt = self.bits_cnt + 1
# Output all TDI/TDO bits if we just switched from SHIFT-* to EXIT1-*.
if self.oldstate.startswith('SHIFT-') and \
self.state.startswith('EXIT1-'):
self.es_bitstring = self.samplenum
t = self.state[-2:] + ' TDI'
b = ''.join(map(str, self.bits_tdi))
h = ' (0x%x' % int('0b' + b, 2) + ')'
s = t + ': ' + b + h + ', ' + str(len(self.bits_tdi)) + ' bits'
self.putx_bs([18, [s]])
self.bits_samplenums_tdi[0][1] = self.samplenum # ES of last bit.
self.putp_bs([t, [b, self.bits_samplenums_tdi]])
self.putx([16, [str(self.bits_tdi[0])]]) # Last bit.
self.bits_tdi = []
self.bits_samplenums_tdi = []
t = self.state[-2:] + ' TDO'
b = ''.join(map(str, self.bits_tdo))
h = ' (0x%x' % int('0b' + b, 2) + ')'
s = t + ': ' + b + h + ', ' + str(len(self.bits_tdo)) + ' bits'
self.putx_bs([19, [s]])
self.bits_samplenums_tdo[0][1] = self.samplenum # ES of last bit.
self.putp_bs([t, [b, self.bits_samplenums_tdo]])
self.putx([17, [str(self.bits_tdo[0])]]) # Last bit.
self.bits_tdo = []
self.bits_samplenums_tdo = []
#self.es_bitstring = self.samplenum
if self.bits_cnt > 0:
if self.bits_cnt == 1: # Only shift one bit
self.ss_bitstring = self.samplenum
self.bits_tdi.insert(0, tdi)
self.bits_tdo.insert(0, tdo)
## Use self.samplenum as SS of the current bit.
self.bits_samplenums_tdi.insert(0, [self.samplenum, -1])
self.bits_samplenums_tdo.insert(0, [self.samplenum, -1])
else:
### ----------------------------------------------------------------
self.putx([16, [str(self.bits_tdi[0])]])
self.putx([17, [str(self.bits_tdo[0])]])
### Use self.samplenum as ES of the previous bit.
self.bits_samplenums_tdi[0][1] = self.samplenum
self.bits_samplenums_tdo[0][1] = self.samplenum
self.bits_tdi.insert(0, tdi)
self.bits_tdo.insert(0, tdo)
## Use self.samplenum as SS of the current bit.
self.bits_samplenums_tdi.insert(0, [self.samplenum, -1])
self.bits_samplenums_tdo.insert(0, [self.samplenum, -1])
## ----------------------------------------------------------------
self.data_ready = True
self.first_bit = True
self.bits_cnt = 0
if self.oldstate.startswith('EXIT'):# and \
#self.state.startswith('PAUSE-'):
if self.data_ready:
self.data_ready = False
self.es_bitstring = self.samplenum
t = self.state[-2:] + ' TDI'
b = ''.join(map(str, self.bits_tdi))
h = ' (0x%X' % int('0b' + b, 2) + ')'
s = t + ': ' + h + ', ' + str(len(self.bits_tdi)) + ' bits' #b +
self.putx_bs([18, [s]])
self.bits_samplenums_tdi[0][1] = self.samplenum # ES of last bit.
self.putp_bs([t, [b, self.bits_samplenums_tdi]])
self.putx([16, [str(self.bits_tdi[0])]]) # Last bit.
self.bits_tdi = []
self.bits_samplenums_tdi = []
self.ss_bitstring = self.samplenum
t = self.state[-2:] + ' TDO'
b = ''.join(map(str, self.bits_tdo))
h = ' (0x%X' % int('0b' + b, 2) + ')'
s = t + ': ' + h + ', ' + str(len(self.bits_tdo)) + ' bits' #+ b
self.putx_bs([19, [s]])
self.bits_samplenums_tdo[0][1] = self.samplenum # ES of last bit.
self.putp_bs([t, [b, self.bits_samplenums_tdo]])
self.putx([17, [str(self.bits_tdo[0])]]) # Last bit.
self.bits_tdo = []
self.bits_samplenums_tdo = []
#self.first_bit = True
#self.bits_cnt = 0
#self.ss_bitstring = self.samplenum
self.ss_item = self.samplenum
def decode(self, ss, es, data):

175
libsigrokdecode4DSL/decoders/lpc/pd.py
View File

@@ -46,13 +46,21 @@ fields = {
# Neither host nor peripheral are allowed to drive 0b11x0.
'CT_DR': {
0b0000: 'I/O read',
0b0001: 'I/O read',
0b0010: 'I/O write',
0b0011: 'I/O write',
0b0100: 'Memory read',
0b0101: 'Memory read',
0b0110: 'Memory write',
0b0111: 'Memory write',
0b1000: 'DMA read',
0b1001: 'DMA read',
0b1010: 'DMA write',
0b1011: 'DMA write',
0b1100: 'Reserved / not allowed',
0b1101: 'Reserved / not allowed',
0b1110: 'Reserved / not allowed',
0b1111: 'Reserved / not allowed',
},
# SIZE field (determines how many bytes are to be transferred)
# Bits[3:2] are reserved, must be driven to 0b00.
@@ -128,26 +136,32 @@ class Decoder(srd.Decoder):
('addr', 'Address'),
('tar1', 'Turn-around cycle 1'),
('sync', 'Sync'),
('timeout', 'Time Out'),
('data', 'Data'),
('tar2', 'Turn-around cycle 2'),
)
annotation_rows = (
('data', 'Data', (1, 2, 3, 4, 5, 6, 7)),
('data', 'Data', (1, 2, 3, 4, 5, 6, 7, 8)),
('warnings', 'Warnings', (0,)),
)
def __init__(self):
self.state = 'IDLE'
self.oldlclk = -1
self.oldlframe = -1
self.oldlad = -1
self.oldlad_bits = -1
self.samplenum = 0
self.clocknum = 0
self.lad = -1
self.addr = 0
self.cur_nibble = 0
self.start_type = -1
self.cycle_type = -1
self.databyte = 0
self.tarcount = 0
self.synccount = 0
self.timeoutcount = 0
self.oldpins = None
self.ss_block = self.es_block = None
@@ -157,38 +171,42 @@ class Decoder(srd.Decoder):
def putb(self, data):
self.put(self.ss_block, self.es_block, self.out_ann, data)
def handle_get_start(self, lad, lad_bits, lframe):
def handle_get_start(self, lframe):
# LAD[3:0]: START field (1 clock cycle).
self.start_type = fields['START'][self.oldlad]
# The last value of LAD[3:0] before LFRAME# gets de-asserted is what
# the peripherals must use. However, the host can keep LFRAME# asserted
# multiple clocks, and we output all START fields that occur, even
# though the peripherals are supposed to ignore all but the last one.
self.es_block = self.samplenum
self.putb([1, [fields['START'][lad], 'START', 'St', 'S']])
self.putb([1, [self.start_type, 'START', 'St', 'S']])
self.ss_block = self.samplenum
# Output a warning if LAD[3:0] changes while LFRAME# is low.
# TODO
if (self.lad != -1 and self.lad != lad):
self.putb([0, ['LAD[3:0] changed while LFRAME# was asserted']])
#if (self.lad != -1 and self.lad != lad):
# self.putb([0, ['LAD[3:0] changed while LFRAME# was asserted']])
# LFRAME# is asserted (low). Wait until it gets de-asserted again
# (the host is allowed to keep it asserted multiple clocks).
if lframe != 1:
return
self.start_field = self.lad
self.state = 'GET CT/DR'
if (self.oldlad == 0b0000):
self.start_field = self.oldlad
self.state = 'GET CT/DR'
else:
self.state = 'IDLE'
def handle_get_ct_dr(self, lad, lad_bits):
def handle_get_ct_dr(self):
# LAD[3:0]: Cycle type / direction field (1 clock cycle).
self.cycle_type = fields['CT_DR'][lad]
self.cycle_type = fields['CT_DR'][self.oldlad]
# TODO: Warning/error on invalid cycle types.
if self.cycle_type == 'Reserved':
self.putb([0, ['Invalid cycle type (%s)' % lad_bits]])
self.putb([0, ['Invalid cycle type (%s)' % self.oldlad_bits]])
self.es_block = self.samplenum
self.putb([2, ['Cycle type: %s' % self.cycle_type]])
@@ -198,7 +216,7 @@ class Decoder(srd.Decoder):
self.addr = 0
self.cur_nibble = 0
def handle_get_addr(self, lad, lad_bits):
def handle_get_addr(self):
# LAD[3:0]: ADDR field (4/8/0 clock cycles).
# I/O cycles: 4 ADDR clocks. Memory cycles: 8 ADDR clocks.
@@ -212,7 +230,7 @@ class Decoder(srd.Decoder):
# Addresses are driven MSN-first.
offset = ((addr_nibbles - 1) - self.cur_nibble) * 4
self.addr |= (lad << offset)
self.addr |= (self.oldlad << offset)
# Continue if we haven't seen all ADDR cycles, yet.
if (self.cur_nibble < addr_nibbles - 1):
@@ -227,20 +245,20 @@ class Decoder(srd.Decoder):
self.state = 'GET TAR'
self.tar_count = 0
def handle_get_tar(self, lad, lad_bits):
def handle_get_tar(self):
# LAD[3:0]: First TAR (turn-around) field (2 clock cycles).
self.es_block = self.samplenum
self.putb([4, ['TAR, cycle %d: %s' % (self.tarcount, lad_bits)]])
self.ss_block = self.samplenum
self.putb([4, ['TAR, cycle %d: %s' % (self.tarcount, self.oldlad_bits)]])
# On the first TAR clock cycle LAD[3:0] is driven to 1111 by
# either the host or peripheral. On the second clock cycle,
# the host or peripheral tri-states LAD[3:0], but its value
# should still be 1111, due to pull-ups on the LAD lines.
if lad_bits != '1111':
if self.oldlad_bits != '1111':
self.putb([0, ['TAR, cycle %d: %s (expected 1111)' % \
(self.tarcount, lad_bits)]])
(self.tarcount, self.oldlad_bits)]])
self.ss_block = self.samplenum
if (self.tarcount != 1):
self.tarcount += 1
@@ -249,34 +267,57 @@ class Decoder(srd.Decoder):
self.tarcount = 0
self.state = 'GET SYNC'
def handle_get_sync(self, lad, lad_bits):
def handle_get_sync(self, lframe):
# LAD[3:0]: SYNC field (1-n clock cycles).
self.sync_val = lad_bits
self.cycle_type = fields['SYNC'][lad]
self.sync_val = self.oldlad_bits
self.cycle_type = fields['SYNC'][self.oldlad]
self.es_block = self.samplenum
# TODO: Warnings if reserved value are seen?
if self.cycle_type == 'Reserved':
self.putb([0, ['SYNC, cycle %d: %s (reserved value)' % \
(self.synccount, self.sync_val)]])
self.es_block = self.samplenum
self.putb([5, ['SYNC, cycle %d: %s' % (self.synccount, self.sync_val)]])
self.ss_block = self.samplenum
# TODO
self.cycle_count = 0
self.state = 'GET DATA'
if (lframe == 0):
self.state = 'GET TIMEOUT'
else:
self.state = 'GET DATA'
def handle_get_data(self, lad, lad_bits):
def handle_get_timeout(self):
# LFRAME#: tie low (4 clock cycles).
if (self.oldlframe != 0):
self.putb([0, ['TIMEOUT cycle, LFRAME# must be low for 4 LCLk cycles']])
self.timeoutcount = 0
self.state = 'IDLE'
return
self.es_block = self.samplenum
self.putb([6, ['Timeout %d' % self.timeoutcount]])
self.ss_block = self.samplenum
if (self.timeoutcount != 3):
self.timeoutcount += 1
return
self.timeoutcount = 0
self.state = 'IDLE'
def handle_get_data(self):
# LAD[3:0]: DATA field (2 clock cycles).
# Data is driven LSN-first.
if (self.cycle_count == 0):
self.databyte = lad
self.databyte = self.oldlad
elif (self.cycle_count == 1):
self.databyte |= (lad << 4)
self.databyte |= (self.oldlad << 4)
else:
raise Exception('Invalid cycle_count: %d' % self.cycle_count)
@@ -285,26 +326,26 @@ class Decoder(srd.Decoder):
return
self.es_block = self.samplenum
self.putb([6, ['DATA: 0x%02x' % self.databyte]])
self.putb([7, ['DATA: 0x%02x' % self.databyte]])
self.ss_block = self.samplenum
self.cycle_count = 0
self.state = 'GET TAR2'
def handle_get_tar2(self, lad, lad_bits):
def handle_get_tar2(self):
# LAD[3:0]: Second TAR field (2 clock cycles).
self.es_block = self.samplenum
self.putb([7, ['TAR, cycle %d: %s' % (self.tarcount, lad_bits)]])
self.putb([8, ['TAR, cycle %d: %s' % (self.tarcount, self.oldlad_bits)]])
self.ss_block = self.samplenum
# On the first TAR clock cycle LAD[3:0] is driven to 1111 by
# either the host or peripheral. On the second clock cycle,
# the host or peripheral tri-states LAD[3:0], but its value
# should still be 1111, due to pull-ups on the LAD lines.
if lad_bits != '1111':
if self.oldlad_bits != '1111':
self.putb([0, ['Warning: TAR, cycle %d: %s (expected 1111)'
% (self.tarcount, lad_bits)]])
% (self.tarcount, self.oldlad_bits)]])
if (self.tarcount != 1):
self.tarcount += 1
@@ -313,15 +354,8 @@ class Decoder(srd.Decoder):
self.tarcount = 0
self.state = 'IDLE'
def decode(self, ss, es, data):
for (self.samplenum, pins) in data:
data.itercnt += 1
# If none of the pins changed, there's nothing to do.
if self.oldpins == pins:
continue
# Store current pin values for the next round.
self.oldpins = pins
def decode(self, ss, es, logic):
for (self.samplenum, pins) in logic:
# Get individual pin values into local variables.
(lframe, lclk, lad0, lad1, lad2, lad3) = pins[:6]
@@ -329,40 +363,63 @@ class Decoder(srd.Decoder):
# Only look at the signals upon rising LCLK edges. The LPC clock
# is the same as the PCI clock (which is sampled at rising edges).
if not (self.oldlclk == 0 and lclk == 1):
self.oldlclk = lclk
continue
logic.logic_mask = 0b0000000000010
logic.exp_logic = 0b0000000000010
logic.edge_index = 1
logic.cur_pos = self.samplenum
#if not (self.oldlclk == 0 and lclk == 1):
# continue
# Store LAD[3:0] bit values (one nibble) in local variables.
# Most (but not all) states need this.
if self.state != 'IDLE':
lad = (lad3 << 3) | (lad2 << 2) | (lad1 << 1) | lad0
lad_bits = bin(lad)[2:].zfill(4)
# self.putb([0, ['LAD: %s' % lad_bits]])
lad = (lad3 << 3) | (lad2 << 2) | (lad1 << 1) | lad0
lad_bits = bin(lad)[2:].zfill(4)
# self.putb([0, ['LAD: %s' % lad_bits]])
# TODO: Only memory read/write is currently supported/tested.
# State machine
if self.state == 'IDLE':
# A valid LPC cycle starts with LFRAME# being asserted (low).
if lframe != 0:
continue
self.ss_block = self.samplenum
self.state = 'GET START'
self.lad = -1
# self.clocknum = 0
#if lframe != 0:
# continue
if (lframe == 0):
if (self.oldlclk == 0 and lclk == 1):
self.ss_block = self.samplenum
self.state = 'GET START'
self.lad = -1
# self.clocknum = 0
else:
logic.logic_mask = 0b0000000000001
logic.exp_logic = 0b0000000000000
logic.edge_index = 0
elif self.state == 'GET START':
self.handle_get_start(lad, lad_bits, lframe)
self.handle_get_start(lframe)
elif self.state == 'GET CT/DR':
self.handle_get_ct_dr(lad, lad_bits)
self.handle_get_ct_dr()
elif self.state == 'GET ADDR':
self.handle_get_addr(lad, lad_bits)
self.handle_get_addr()
elif self.state == 'GET TAR':
self.handle_get_tar(lad, lad_bits)
self.handle_get_tar()
elif self.state == 'GET SYNC':
self.handle_get_sync(lad, lad_bits)
self.handle_get_sync(lframe)
elif self.state == 'GET TIMEOUT':
self.handle_get_timeout()
elif self.state == 'GET DATA':
self.handle_get_data(lad, lad_bits)
self.handle_get_data()
elif self.state == 'GET TAR2':
self.handle_get_tar2(lad, lad_bits)
self.handle_get_tar2()
# Store current pin values for the next round.
self.oldpins = pins
if (logic.edge_index == 1):
self.oldlclk = 0
else:
self.oldlclk = -1
if (logic.edge_index == 0):
self.oldlframe = 1
else:
self.oldlframe = lframe
self.oldlad = lad
self.oldlad_bits = lad_bits

289
libsigrokdecode4DSL/decoders/onewire_link/pd.py.back
View File

@@ -1,289 +0,0 @@
##
## This file is part of the libsigrokdecode project.
##
## Copyright (C) 2012 Iztok Jeras <iztok.jeras@gmail.com>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
import sigrokdecode as srd
class SamplerateError(Exception):
pass
class Decoder(srd.Decoder):
api_version = 2
id = 'onewire_link'
name = 'One-Wire link layer'
longname = 'One-Wire serial communication bus (link layer)'
desc = 'Bidirectional, half-duplex, asynchronous serial bus.'
license = 'gplv2+'
inputs = ['logic']
outputs = ['onewire_link']
channels = (
{'id': 'owr', 'name': 'OWR', 'desc': '1-Wire signal line'},
)
optional_channels = (
{'id': 'pwr', 'name': 'PWR', 'desc': '1-Wire power supply pin'},
)
options = (
{'id': 'overdrive',
'desc': 'Overdrive mode', 'default': 'no', 'values': ('yes', 'no')},
# Time options (specified in microseconds):
{'id': 'cnt_normal_bit',
'desc': 'Normal mode sample bit time (μs)', 'default': 15},
{'id': 'cnt_normal_slot',
'desc': 'Normal mode data slot time (μs)', 'default': 60},
{'id': 'cnt_normal_presence',
'desc': 'Normal mode sample presence time (μs)', 'default': 75},
{'id': 'cnt_normal_reset',
'desc': 'Normal mode reset time (μs)', 'default': 480},
{'id': 'cnt_overdrive_bit',
'desc': 'Overdrive mode sample bit time (μs)', 'default': 2},
{'id': 'cnt_overdrive_slot',
'desc': 'Overdrive mode data slot time (μs)', 'default': 7.3},
{'id': 'cnt_overdrive_presence',
'desc': 'Overdrive mode sample presence time (μs)', 'default': 10},
{'id': 'cnt_overdrive_reset',
'desc': 'Overdrive mode reset time (μs)', 'default': 48},
)
annotations = (
('bit', 'Bit'),
('warnings', 'Warnings'),
('reset', 'Reset'),
('presence', 'Presence'),
('overdrive', 'Overdrive mode notifications'),
)
annotation_rows = (
('bits', 'Bits', (0, 2, 3)),
('info', 'Info', (4,)),
('warnings', 'Warnings', (1,)),
)
def putm(self, data):
self.put(0, 0, self.out_ann, data)
def putpb(self, data):
self.put(self.fall, self.samplenum, self.out_python, data)
def putb(self, data):
self.put(self.fall, self.samplenum, self.out_ann, data)
def putx(self, data):
self.put(self.fall, self.cnt_bit[self.overdrive], self.out_ann, data)
def putfr(self, data):
self.put(self.fall, self.rise, self.out_ann, data)
def putprs(self, data):
self.put(self.rise, self.samplenum, self.out_python, data)
def putrs(self, data):
self.put(self.rise, self.samplenum, self.out_ann, data)
def __init__(self):
self.samplerate = None
self.samplenum = 0
self.state = 'WAIT FOR FALLING EDGE'
self.present = 0
self.bit = 0
self.bit_cnt = 0
self.command = 0
self.overdrive = 0
self.fall = 0
self.rise = 0
def start(self):
self.out_python = self.register(srd.OUTPUT_PYTHON)
self.out_ann = self.register(srd.OUTPUT_ANN)
def checks(self):
# Check if samplerate is appropriate.
if self.options['overdrive'] == 'yes':
if self.samplerate < 2000000:
self.putm([1, ['Sampling rate is too low. Must be above ' +
'2MHz for proper overdrive mode decoding.']])
elif self.samplerate < 5000000:
self.putm([1, ['Sampling rate is suggested to be above 5MHz ' +
'for proper overdrive mode decoding.']])
else:
if self.samplerate < 400000:
self.putm([1, ['Sampling rate is too low. Must be above ' +
'400kHz for proper normal mode decoding.']])
elif self.samplerate < 1000000:
self.putm([1, ['Sampling rate is suggested to be above ' +
'1MHz for proper normal mode decoding.']])
# Check if sample times are in the allowed range.
time_min = float(self.cnt_normal_bit) / self.samplerate
time_max = float(self.cnt_normal_bit + 1) / self.samplerate
if (time_min < 0.000005) or (time_max > 0.000015):
self.putm([1, ['The normal mode data sample time interval ' +
'(%2.1fus-%2.1fus) should be inside (5.0us, 15.0us).'
% (time_min * 1000000, time_max * 1000000)]])
time_min = float(self.cnt_normal_presence) / self.samplerate
time_max = float(self.cnt_normal_presence + 1) / self.samplerate
if (time_min < 0.0000681) or (time_max > 0.000075):
self.putm([1, ['The normal mode presence sample time interval ' +
'(%2.1fus-%2.1fus) should be inside (68.1us, 75.0us).'
% (time_min * 1000000, time_max * 1000000)]])
time_min = float(self.cnt_overdrive_bit) / self.samplerate
time_max = float(self.cnt_overdrive_bit + 1) / self.samplerate
if (time_min < 0.000001) or (time_max > 0.000002):
self.putm([1, ['The overdrive mode data sample time interval ' +
'(%2.1fus-%2.1fus) should be inside (1.0us, 2.0us).'
% (time_min * 1000000, time_max * 1000000)]])
time_min = float(self.cnt_overdrive_presence) / self.samplerate
time_max = float(self.cnt_overdrive_presence + 1) / self.samplerate
if (time_min < 0.0000073) or (time_max > 0.000010):
self.putm([1, ['The overdrive mode presence sample time interval ' +
'(%2.1fus-%2.1fus) should be inside (7.3us, 10.0us).'
% (time_min * 1000000, time_max * 1000000)]])
def metadata(self, key, value):
if key != srd.SRD_CONF_SAMPLERATE:
return
self.samplerate = value
# The default 1-Wire time base is 30us. This is used to calculate
# sampling times.
samplerate = float(self.samplerate)
x = float(self.options['cnt_normal_bit']) / 1000000.0
self.cnt_normal_bit = int(samplerate * x) - 1
x = float(self.options['cnt_normal_slot']) / 1000000.0
self.cnt_normal_slot = int(samplerate * x) - 1
x = float(self.options['cnt_normal_presence']) / 1000000.0
self.cnt_normal_presence = int(samplerate * x) - 1
x = float(self.options['cnt_normal_reset']) / 1000000.0
self.cnt_normal_reset = int(samplerate * x) - 1
x = float(self.options['cnt_overdrive_bit']) / 1000000.0
self.cnt_overdrive_bit = int(samplerate * x) - 1
x = float(self.options['cnt_overdrive_slot']) / 1000000.0
self.cnt_overdrive_slot = int(samplerate * x) - 1
x = float(self.options['cnt_overdrive_presence']) / 1000000.0
self.cnt_overdrive_presence = int(samplerate * x) - 1
x = float(self.options['cnt_overdrive_reset']) / 1000000.0
self.cnt_overdrive_reset = int(samplerate * x) - 1
# Organize values into lists.
self.cnt_bit = [self.cnt_normal_bit, self.cnt_overdrive_bit]
self.cnt_presence = [self.cnt_normal_presence, self.cnt_overdrive_presence]
self.cnt_reset = [self.cnt_normal_reset, self.cnt_overdrive_reset]
self.cnt_slot = [self.cnt_normal_slot, self.cnt_overdrive_slot]
def decode(self, ss, es, data):
if not self.samplerate:
raise SamplerateError('Cannot decode without samplerate.')
for (self.samplenum, (owr, pwr)) in data:
data.itercnt += 1
if self.samplenum == 0:
self.checks()
# State machine.
if self.state == 'WAIT FOR FALLING EDGE':
# The start of a cycle is a falling edge.
if owr != 0:
continue
# Save the sample number for the falling edge.
self.fall = self.samplenum
# Go to waiting for sample time.
self.state = 'WAIT FOR DATA SAMPLE'
elif self.state == 'WAIT FOR DATA SAMPLE':
# Sample data bit.
t = self.samplenum - self.fall
if t == self.cnt_bit[self.overdrive]:
self.bit = owr
self.state = 'WAIT FOR DATA SLOT END'
elif self.state == 'WAIT FOR DATA SLOT END':
# A data slot ends in a recovery period, otherwise, this is
# probably a reset.
t = self.samplenum - self.fall
if t != self.cnt_slot[self.overdrive]:
continue
if owr == 0:
# This seems to be a reset slot, wait for its end.
self.state = 'WAIT FOR RISING EDGE'
continue
self.putb([0, ['Bit: %d' % self.bit, '%d' % self.bit]])
self.putpb(['BIT', self.bit])
# Checking the first command to see if overdrive mode
# should be entered.
if self.bit_cnt <= 8:
self.command |= (self.bit << self.bit_cnt)
elif self.bit_cnt == 8 and self.command in [0x3c, 0x69]:
self.putx([4, ['Entering overdrive mode', 'Overdrive on']])
# Increment the bit counter.
self.bit_cnt += 1
# Wait for next slot.
self.state = 'WAIT FOR FALLING EDGE'
elif self.state == 'WAIT FOR RISING EDGE':
# The end of a cycle is a rising edge.
if owr != 1:
continue
# Check if this was a reset cycle.
t = self.samplenum - self.fall
if t > self.cnt_normal_reset:
# Save the sample number for the rising edge.
self.rise = self.samplenum
self.putfr([2, ['Reset', 'Rst', 'R']])
self.state = 'WAIT FOR PRESENCE DETECT'
# Exit overdrive mode.
if self.overdrive:
self.putx([4, ['Exiting overdrive mode', 'Overdrive off']])
self.overdrive = 0
# Clear command bit counter and data register.
self.bit_cnt = 0
self.command = 0
elif (t > self.cnt_overdrive_reset) and self.overdrive:
# Save the sample number for the rising edge.
self.rise = self.samplenum
self.putfr([2, ['Reset', 'Rst', 'R']])
self.state = 'WAIT FOR PRESENCE DETECT'
# Otherwise this is assumed to be a data bit.
else:
self.state = 'WAIT FOR FALLING EDGE'
elif self.state == 'WAIT FOR PRESENCE DETECT':
# Sample presence status.
t = self.samplenum - self.rise
if t == self.cnt_presence[self.overdrive]:
self.present = owr
self.state = 'WAIT FOR RESET SLOT END'
elif self.state == 'WAIT FOR RESET SLOT END':
# A reset slot ends in a long recovery period.
t = self.samplenum - self.rise
if t != self.cnt_reset[self.overdrive]:
continue
if owr == 0:
# This seems to be a reset slot, wait for its end.
self.state = 'WAIT FOR RISING EDGE'
continue
p = 'false' if self.present else 'true'
self.putrs([3, ['Presence: %s' % p, 'Presence', 'Pres', 'P']])
self.putprs(['RESET/PRESENCE', not self.present])
# Wait for next slot.
self.state = 'WAIT FOR FALLING EDGE'

32
libsigrokdecode4DSL/decoders/spi/__init__.py
View File

@@ -1,32 +0,0 @@
##
## This file is part of the libsigrokdecode project.
##
## Copyright (C) 2012 Uwe Hermann <uwe@hermann-uwe.de>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
'''
The SPI (Serial Peripheral Interface) protocol decoder supports synchronous
SPI(-like) protocols with a clock line, a MISO and MOSI line for data
transfer in two directions, and an optional CS# pin.
Either MISO or MOSI (but not both) can be optional.
If CS# is supplied, data is only decoded when CS# is asserted (clock
transitions where CS# is not asserted are ignored). If CS# is not supplied,
data is decoded on every clock transition (depending on SPI mode).
'''
from .pd import Decoder

334
libsigrokdecode4DSL/decoders/spi/pd.py
View File

@@ -1,334 +0,0 @@
##
## This file is part of the libsigrokdecode project.
##
## Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
## Copyright (C) 2012-2014 Uwe Hermann <uwe@hermann-uwe.de>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
import sigrokdecode as srd
from collections import namedtuple
Data = namedtuple('Data', ['ss', 'es', 'val'])
'''
OUTPUT_PYTHON format:
Packet:
[<ptype>, <data1>, <data2>]
<ptype>:
- 'DATA': <data1> contains the MOSI data, <data2> contains the MISO data.
The data is _usually_ 8 bits (but can also be fewer or more bits).
Both data items are Python numbers (not strings), or None if the respective
channel was not supplied.
- 'BITS': <data1>/<data2> contain a list of bit values in this MOSI/MISO data
item, and for each of those also their respective start-/endsample numbers.
- 'CS-CHANGE': <data1> is the old CS# pin value, <data2> is the new value.
Both data items are Python numbers (0/1), not strings. At the beginning of
the decoding a packet is generated with <data1> = None and <data2> being the
initial state of the CS# pin or None if the chip select pin is not supplied.
- 'TRANSFER': <data1>/<data2> contain a list of Data() namedtuples for each
byte transferred during this block of CS# asserted time. Each Data() has
fields ss, es, and val.
Examples:
['CS-CHANGE', None, 1]
['CS-CHANGE', 1, 0]
['DATA', 0xff, 0x3a]
['BITS', [[1, 80, 82], [1, 83, 84], [1, 85, 86], [1, 87, 88],
[1, 89, 90], [1, 91, 92], [1, 93, 94], [1, 95, 96]],
[[0, 80, 82], [1, 83, 84], [0, 85, 86], [1, 87, 88],
[1, 89, 90], [1, 91, 92], [0, 93, 94], [0, 95, 96]]]
['DATA', 0x65, 0x00]
['DATA', 0xa8, None]
['DATA', None, 0x55]
['CS-CHANGE', 0, 1]
['TRANSFER', [Data(ss=80, es=96, val=0xff), ...],
[Data(ss=80, es=96, val=0x3a), ...]]
'''
# Key: (CPOL, CPHA). Value: SPI mode.
# Clock polarity (CPOL) = 0/1: Clock is low/high when inactive.
# Clock phase (CPHA) = 0/1: Data is valid on the leading/trailing clock edge.
spi_mode = {
(0, 0): 0, # Mode 0
(0, 1): 1, # Mode 1
(1, 0): 2, # Mode 2
(1, 1): 3, # Mode 3
}
class SamplerateError(Exception):
pass
class ChannelError(Exception):
pass
class Decoder(srd.Decoder):
api_version = 2
id = 'spi'
name = 'SPI'
longname = 'Serial Peripheral Interface'
desc = 'Full-duplex, synchronous, serial bus.'
license = 'gplv2+'
inputs = ['logic']
outputs = ['spi']
channels = (
{'id': 'clk', 'name': 'CLK', 'desc': 'Clock'},
)
optional_channels = (
{'id': 'miso', 'name': 'MISO', 'desc': 'Master in, slave out'},
{'id': 'mosi', 'name': 'MOSI', 'desc': 'Master out, slave in'},
{'id': 'cs', 'name': 'CS#', 'desc': 'Chip-select'},
)
options = (
{'id': 'cs_polarity', 'desc': 'CS# polarity', 'default': 'active-low',
'values': ('active-low', 'active-high')},
{'id': 'cpol', 'desc': 'Clock polarity', 'default': 0,
'values': (0, 1)},
{'id': 'cpha', 'desc': 'Clock phase', 'default': 0,
'values': (0, 1)},
{'id': 'bitorder', 'desc': 'Bit order',
'default': 'msb-first', 'values': ('msb-first', 'lsb-first')},
{'id': 'wordsize', 'desc': 'Word size', 'default': 8},
)
annotations = (
('miso-data', 'MISO data'),
('mosi-data', 'MOSI data'),
('miso-bits', 'MISO bits'),
('mosi-bits', 'MOSI bits'),
('warnings', 'Human-readable warnings'),
)
annotation_rows = (
('miso-data', 'MISO data', (0,)),
('miso-bits', 'MISO bits', (2,)),
('mosi-data', 'MOSI data', (1,)),
('mosi-bits', 'MOSI bits', (3,)),
('other', 'Other', (4,)),
)
binary = (
('miso', 'MISO'),
('mosi', 'MOSI'),
)
def __init__(self):
self.samplerate = None
self.oldclk = -1
self.bitcount = 0
self.misodata = self.mosidata = 0
self.misobits = []
self.mosibits = []
self.misobytes = []
self.mosibytes = []
self.ss_block = -1
self.samplenum = -1
self.ss_transfer = -1
self.cs_was_deasserted = False
self.oldcs = None
self.oldpins = None
self.have_cs = self.have_miso = self.have_mosi = None
self.no_cs_notification = False
def metadata(self, key, value):
if key == srd.SRD_CONF_SAMPLERATE:
self.samplerate = value
def start(self):
self.out_python = self.register(srd.OUTPUT_PYTHON)
self.out_ann = self.register(srd.OUTPUT_ANN)
self.out_bin = self.register(srd.OUTPUT_BINARY)
self.out_bitrate = self.register(srd.OUTPUT_META,
meta=(int, 'Bitrate', 'Bitrate during transfers'))
def putw(self, data):
self.put(self.ss_block, self.samplenum, self.out_ann, data)
def putdata(self):
# Pass MISO and MOSI bits and then data to the next PD up the stack.
so = self.misodata if self.have_miso else None
si = self.mosidata if self.have_mosi else None
so_bits = self.misobits if self.have_miso else None
si_bits = self.mosibits if self.have_mosi else None
if self.have_miso:
ss, es = self.misobits[-1][1], self.misobits[0][2]
#self.put(ss, es, self.out_bin, (0, bytes([so])))
if self.have_mosi:
ss, es = self.mosibits[-1][1], self.mosibits[0][2]
#self.put(ss, es, self.out_bin, (1, bytes([si])))
self.put(ss, es, self.out_python, ['BITS', si_bits, so_bits])
self.put(ss, es, self.out_python, ['DATA', si, so])
if self.have_miso:
self.misobytes.append(Data(ss=ss, es=es, val=so))
if self.have_mosi:
self.mosibytes.append(Data(ss=ss, es=es, val=si))
# Bit annotations.
if self.have_miso:
for bit in self.misobits:
self.put(bit[1], bit[2], self.out_ann, [2, ['%d' % bit[0]]])
if self.have_mosi:
for bit in self.mosibits:
self.put(bit[1], bit[2], self.out_ann, [3, ['%d' % bit[0]]])
# Dataword annotations.
if self.have_miso:
self.put(ss, es, self.out_ann, [0, ['%02X' % self.misodata]])
if self.have_mosi:
self.put(ss, es, self.out_ann, [1, ['%02X' % self.mosidata]])
def reset_decoder_state(self):
self.misodata = 0 if self.have_miso else None
self.mosidata = 0 if self.have_mosi else None
self.misobits = [] if self.have_miso else None
self.mosibits = [] if self.have_mosi else None
self.bitcount = 0
def cs_asserted(self, cs):
active_low = (self.options['cs_polarity'] == 'active-low')
return (cs == 0) if active_low else (cs == 1)
def handle_bit(self, miso, mosi, clk, cs):
# If this is the first bit of a dataword, save its sample number.
if self.bitcount == 0:
self.ss_block = self.samplenum
self.cs_was_deasserted = \
not self.cs_asserted(cs) if self.have_cs else False
ws = self.options['wordsize']
# Receive MISO bit into our shift register.
if self.have_miso:
if self.options['bitorder'] == 'msb-first':
self.misodata |= miso << (ws - 1 - self.bitcount)
else:
self.misodata |= miso << self.bitcount
# Receive MOSI bit into our shift register.
if self.have_mosi:
if self.options['bitorder'] == 'msb-first':
self.mosidata |= mosi << (ws - 1 - self.bitcount)
else:
self.mosidata |= mosi << self.bitcount
# Guesstimate the endsample for this bit (can be overridden below).
es = self.samplenum
if self.bitcount > 0:
if self.have_miso:
es += self.samplenum - self.misobits[0][1]
elif self.have_mosi:
es += self.samplenum - self.mosibits[0][1]
if self.have_miso:
self.misobits.insert(0, [miso, self.samplenum, es])
if self.have_mosi:
self.mosibits.insert(0, [mosi, self.samplenum, es])
if self.bitcount > 0 and self.have_miso:
self.misobits[1][2] = self.samplenum
if self.bitcount > 0 and self.have_mosi:
self.mosibits[1][2] = self.samplenum
self.bitcount += 1
# Continue to receive if not enough bits were received, yet.
if self.bitcount != ws:
return
self.putdata()
# Meta bitrate.
elapsed = 1 / float(self.samplerate)
elapsed *= (self.samplenum - self.ss_block + 1)
bitrate = int(1 / elapsed * self.options['wordsize'])
self.put(self.ss_block, self.samplenum, self.out_bitrate, bitrate)
if self.have_cs and self.cs_was_deasserted:
self.putw([4, ['CS# was deasserted during this data word!']])
self.reset_decoder_state()
def find_clk_edge(self, miso, mosi, clk, cs):
if self.have_cs and self.oldcs != cs:
# Send all CS# pin value changes.
self.put(self.samplenum, self.samplenum, self.out_python,
['CS-CHANGE', self.oldcs, cs])
self.oldcs = cs
if self.cs_asserted(cs):
self.ss_transfer = self.samplenum
self.misobytes = []
self.mosibytes = []
else:
self.put(self.ss_transfer, self.samplenum, self.out_python,
['TRANSFER', self.mosibytes, self.misobytes])
# Reset decoder state when CS# changes (and the CS# pin is used).
self.reset_decoder_state()
# We only care about samples if CS# is asserted.
if self.have_cs and not self.cs_asserted(cs):
return
# Ignore sample if the clock pin hasn't changed.
if clk == self.oldclk:
return
self.oldclk = clk
# Sample data on rising/falling clock edge (depends on mode).
mode = spi_mode[self.options['cpol'], self.options['cpha']]
if mode == 0 and clk == 0: # Sample on rising clock edge
return
elif mode == 1 and clk == 1: # Sample on falling clock edge
return
elif mode == 2 and clk == 1: # Sample on falling clock edge
return
elif mode == 3 and clk == 0: # Sample on rising clock edge
return
# Found the correct clock edge, now get the SPI bit(s).
self.handle_bit(miso, mosi, clk, cs)
def decode(self, ss, es, data):
if not self.samplerate:
raise SamplerateError('Cannot decode without samplerate.')
# Either MISO or MOSI can be omitted (but not both). CS# is optional.
for (self.samplenum, pins) in data:
data.itercnt += 1
# Ignore identical samples early on (for performance reasons).
if self.oldpins == pins:
continue
(clk, miso, mosi, cs) = pins
if self.oldpins == None:
self.oldclk = clk
self.oldpins = pins
self.have_miso = (miso in (0, 1))
self.have_mosi = (mosi in (0, 1))
self.have_cs = (cs in (0, 1))
# Either MISO or MOSI (but not both) can be omitted.
if not (self.have_miso or self.have_mosi):
raise ChannelError('Either MISO or MOSI (or both) pins required.')
# Tell stacked decoders that we don't have a CS# signal.
if not self.no_cs_notification and not self.have_cs:
self.put(0, 0, self.out_python, ['CS-CHANGE', None, None])
self.no_cs_notification = True
self.find_clk_edge(miso, mosi, clk, cs)

2
libsigrokdecode4DSL/exception.c
View File

@@ -92,7 +92,7 @@ SRD_PRIV void srd_exception_catch(char **error, const char *format, ...)
py_etype = py_evalue = py_etraceback = py_mod = py_func = NULL;
va_start(args, error);
va_start(args, format);
msg = g_strdup_vprintf(format, args);
va_end(args);

1
libsigrokdecode4DSL/instance.c
View File

@@ -156,6 +156,7 @@ SRD_API int srd_inst_option_set(struct srd_decoder_inst *di,
/* Not harmful even if we used the default. */
g_hash_table_remove(options, sdo->id);
}
Py_DECREF(py_di_options);
if (g_hash_table_size(options) != 0)
srd_warn("Unknown options specified for '%s'", di->inst_id);

2
libsigrokdecode4DSL/libsigrokdecode-internal.h
View File

@@ -37,7 +37,7 @@ typedef struct {
uint64_t start_samplenum;
float itercnt;
uint8_t **inbuf;
uint8_t *inbuf_const;
const uint8_t *inbuf_const;
uint64_t samplenum;
PyObject *sample;

2
libsigrokdecode4DSL/libsigrokdecode.h
View File

@@ -43,7 +43,7 @@ extern "C" {
* The correct way to get/use the libsigrokdecode API functions is:
*
* @code{.c}
* #include <libsigrokdecode/libsigrokdecode.h>
* #include <libsigrokdecode4DSL/libsigrokdecode.h>
* @endcode
*/

18
libsigrokdecode4DSL/libsigrokdecode.pc.in
View File

@@ -1,18 +0,0 @@
prefix=@prefix@
exec_prefix=@exec_prefix@
libdir=@libdir@
includedir=@includedir@
datarootdir=@datarootdir@
datadir=@datadir@
pkgdatadir=${datadir}/@PACKAGE_TARNAME@
decodersdir=${pkgdatadir}/decoders
Name: libsigrokdecode
Description: Protocol decoder library of the sigrok logic analyzer software
URL: http://www.sigrok.org
Requires: glib-2.0
Requires.private: @SRD_PKGLIBS@
Version: @SRD_PACKAGE_VERSION@
Libs: -L${libdir} -lsigrokdecode
Libs.private: @SRD_EXTRA_LIBS@
Cflags: -I${includedir}

2
libsigrokdecode4DSL/srd.c
View File

@@ -18,7 +18,7 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <config.h>
#include "config.h"
#include "libsigrokdecode-internal.h" /* First, so we avoid a _POSIX_C_SOURCE warning. */
#include "libsigrokdecode.h"
#include <glib.h>

8
libsigrokdecode4DSL/util.c
View File

@@ -126,7 +126,7 @@ SRD_PRIV int py_dictitem_as_str(PyObject *py_obj, const char *key,
SRD_PRIV int py_dictitem_to_int(PyObject *py_obj, const char *key)
{
PyObject *py_value;
PyObject *py_long;
long type;
if (!PyDict_Check(py_obj)) {
srd_dbg("Object is not a dictionary.");
@@ -137,8 +137,10 @@ SRD_PRIV int py_dictitem_to_int(PyObject *py_obj, const char *key)
srd_dbg("Dictionary has no attribute '%s'.", key);
return -1;
}
py_long = PyLong_FromUnicodeObject(py_value, 10);
return PyLong_AsLong(py_long);
type = PyLong_Check(py_value) ? PyLong_AsLong(py_value) : -1;
return type;
}
/**