forked from Ivasoft/DSView
Add 'SLE44xx memory card' decoder from libsigrokdecode codebase
This commit is contained in:
Abdelhak Bougouffa
26
libsigrokdecode4DSL/decoders/sle44xx/__init__.py
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26
libsigrokdecode4DSL/decoders/sle44xx/__init__.py
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@@ -0,0 +1,26 @@
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##
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## This file is part of the libsigrokdecode project.
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##
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## Copyright (C) 2019 Federico Cerutti <federico@ceres-c.it>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, see <http://www.gnu.org/licenses/>.
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##
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'''
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SLE 4418/28/32/42 memory cards implement a 2-wire protocol (CLK and I/O)
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for data communication, along with the RST signal which resets the card's
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internal state, and can terminate currently executing long memory reads.
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'''
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from .pd import Decoder
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541
libsigrokdecode4DSL/decoders/sle44xx/pd.py
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541
libsigrokdecode4DSL/decoders/sle44xx/pd.py
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@@ -0,0 +1,541 @@
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##
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## This file is part of the libsigrokdecode project.
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##
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## Copyright (C) 2019 Federico Cerutti <federico@ceres-c.it>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, see <http://www.gnu.org/licenses/>.
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##
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from common.srdhelper import bitpack_lsb
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import sigrokdecode as srd
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class Pin:
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RST, CLK, IO, = range(3)
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class Ann:
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RESET_SYM, INTR_SYM, START_SYM, STOP_SYM, BIT_SYM, \
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ATR_BYTE, CMD_BYTE, OUT_BYTE, PROC_BYTE, \
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ATR_DATA, CMD_DATA, OUT_DATA, PROC_DATA, \
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= range(13)
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class Bin:
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BYTES, = range(1)
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class Decoder(srd.Decoder):
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api_version = 3
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id = 'sle44xx'
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name = 'SLE 44xx'
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longname = 'SLE44xx memory card'
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desc = 'SLE 4418/28/32/42 memory card serial protocol'
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license = 'gplv2+'
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inputs = ['logic']
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outputs = []
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tags = ['Memory']
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channels = (
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{'id': 'rst', 'name': 'RST', 'desc': 'Reset line'},
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{'id': 'clk', 'name': 'CLK', 'desc': 'Clock line'},
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{'id': 'io', 'name': 'I/O', 'desc': 'I/O data line'},
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)
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annotations = (
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('reset_sym', 'Reset Symbol'),
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('intr_sym', 'Interrupt Symbol'),
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('start_sym', 'Start Symbol'),
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('stop_sym', 'Stop Symbol'),
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('bit_sym', 'Bit Symbol'),
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('atr_byte', 'ATR Byte'),
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('cmd_byte', 'Command Byte'),
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('out_byte', 'Outgoing Byte'),
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('proc_byte', 'Processing Byte'),
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('atr_data', 'ATR data'),
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('cmd_data', 'Command data'),
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('out_data', 'Outgoing data'),
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('proc_data', 'Processing data'),
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)
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annotation_rows = (
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('symbols', 'Symbols', (Ann.RESET_SYM, Ann.INTR_SYM,
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Ann.START_SYM, Ann.STOP_SYM, Ann.BIT_SYM,)),
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('fields', 'Fields', (Ann.ATR_BYTE,
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Ann.CMD_BYTE, Ann.OUT_BYTE, Ann.PROC_BYTE,)),
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('operations', 'Operations', (Ann.ATR_DATA,
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Ann.CMD_DATA, Ann.OUT_DATA, Ann.PROC_DATA,)),
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)
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binary = (
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('bytes', 'Bytes'),
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)
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def __init__(self):
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self.reset()
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def reset(self):
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self.samplerate = None
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self.max_addr = 256
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self.bits = []
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self.atr_bytes = []
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self.cmd_bytes = []
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self.cmd_proc = None
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self.out_len = None
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self.out_bytes = []
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self.proc_state = None
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self.state = None
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def metadata(self, key, value):
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if key == srd.SRD_CONF_SAMPLERATE:
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self.samplerate = value
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def start(self):
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self.out_ann = self.register(srd.OUTPUT_ANN)
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self.out_binary = self.register(srd.OUTPUT_BINARY)
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def putx(self, ss, es, cls, data):
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self.put(ss, es, self.out_ann, [cls, data,])
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def putb(self, ss, es, cls , data):
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self.put(ss, es, self.out_binary, [cls, data,])
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def snums_to_usecs(self, snum_count):
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if not self.samplerate:
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return None
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snums_per_usec = self.samplerate / 1e6
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usecs = snum_count / snums_per_usec
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return usecs
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def lookup_proto_ann_txt(self, key, variables):
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ann = {
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'RESET_SYM': [Ann.RESET_SYM, 'Reset', 'R',],
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'INTR_SYM': [Ann.INTR_SYM, 'Interrupt', 'Intr', 'I',],
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'START_SYM': [Ann.START_SYM, 'Start', 'ST', 'S',],
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'STOP_SYM': [Ann.STOP_SYM, 'Stop', 'SP', 'P',],
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'BIT_SYM': [Ann.BIT_SYM, '{bit}',],
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'ATR_BYTE': [Ann.ATR_BYTE,
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'Answer To Reset: {data:02x}',
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'ATR: {data:02x}',
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'{data:02x}',
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],
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'CMD_BYTE': [Ann.CMD_BYTE,
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'Command: {data:02x}',
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'Cmd: {data:02x}',
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'{data:02x}',
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],
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'OUT_BYTE': [Ann.OUT_BYTE,
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'Outgoing data: {data:02x}',
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'Data: {data:02x}',
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'{data:02x}',
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],
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'PROC_BYTE': [Ann.PROC_BYTE,
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'Internal processing: {data:02x}',
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'Proc: {data:02x}',
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'{data:02x}',
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],
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'ATR_DATA': [Ann.ATR_DATA,
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'Answer To Reset: {data}',
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'ATR: {data}',
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'{data}',
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],
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'CMD_DATA': [Ann.CMD_DATA,
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'Command: {data}',
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'Cmd: {data}',
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'{data}',
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],
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'OUT_DATA': [Ann.OUT_DATA,
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'Outgoing: {data}',
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'Out: {data}',
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'{data}',
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],
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'PROC_DATA': [Ann.PROC_DATA,
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'Processing: {data}',
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'Proc: {data}',
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'{data}',
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],
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}.get(key, None)
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if ann is None:
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return None, []
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cls, texts = ann[0], ann[1:]
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texts = [t.format(**variables) for t in texts]
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return cls, texts
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def text_for_accu_bytes(self, accu):
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if not accu:
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return None, None, None, None
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ss, es = accu[0][1], accu[-1][2]
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data = [a[0] for a in accu]
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text = " ".join(['{:02x}'.format(a) for a in data])
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return ss, es, data, text
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def flush_queued(self):
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'''Flush previously accumulated operations details.'''
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# Can be called when either the completion of an operation got
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# detected (reliably), or when some kind of reset condition was
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# met while a potential previously observed operation has not
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# been postprocessed yet (best effort). Should not harm when the
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# routine gets invoked while no data was collected yet, or was
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# flushed already.
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# BEWARE! Will void internal state. Should really only get called
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# "between operations", NOT between fields of an operation.
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if self.atr_bytes:
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key = 'ATR_DATA'
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ss, es, _, text = self.text_for_accu_bytes(self.atr_bytes)
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cls, texts = self.lookup_proto_ann_txt(key, {'data': text})
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self.putx(ss, es, cls, texts)
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if self.cmd_bytes:
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key = 'CMD_DATA'
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ss, es, _, text = self.text_for_accu_bytes(self.cmd_bytes)
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cls, texts = self.lookup_proto_ann_txt(key, {'data': text})
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self.putx(ss, es, cls, texts)
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if self.out_bytes:
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key = 'OUT_DATA'
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ss, es, _, text = self.text_for_accu_bytes(self.out_bytes)
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cls, texts = self.lookup_proto_ann_txt(key, {'data': text})
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self.putx(ss, es, cls, texts)
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if self.proc_state:
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key = 'PROC_DATA'
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ss = self.proc_state['ss']
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es = self.proc_state['es']
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clk = self.proc_state['clk']
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high = self.proc_state['io1']
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text = '{clk} clocks, I/O {high}'.format(clk = clk, high = int(high))
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usecs = self.snums_to_usecs(es - ss)
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if usecs:
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msecs = usecs / 1000
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text = '{msecs:.2f} ms, {text}'.format(msecs = msecs, text = text)
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cls, texts = self.lookup_proto_ann_txt(key, {'data': text})
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self.putx(ss, es, cls, texts)
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self.atr_bytes = None
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self.cmd_bytes = None
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self.cmd_proc = None
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self.out_len = None
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self.out_bytes = None
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self.proc_state = None
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self.state = None
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def handle_reset(self, ss, es, has_clk):
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self.flush_queued()
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key = '{}_SYM'.format('RESET' if has_clk else 'INTR')
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cls, texts = self.lookup_proto_ann_txt(key, {})
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self.putx(ss, es, cls, texts)
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self.bits = []
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self.state = 'ATR' if has_clk else None
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def handle_command(self, ss, is_start):
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if is_start:
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self.flush_queued()
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key = '{}_SYM'.format('START' if is_start else 'STOP')
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cls, texts = self.lookup_proto_ann_txt(key, {})
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self.putx(ss, ss, cls, texts)
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self.bits = []
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self.state = 'CMD' if is_start else 'DATA'
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def command_check(self, ctrl, addr, data):
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'''Interpret CTRL/ADDR/DATA command entry.'''
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# See the Siemens Datasheet section 2.3 Commands. The abbreviated
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# text variants are my guesses, terse for readability at coarser
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# zoom levels.
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codes_table = {
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0x30: {
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'fmt': [
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'read main memory, addr {addr:02x}',
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'RD-M @{addr:02x}',
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],
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'len': lambda ctrl, addr, data: self.max_addr - addr,
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},
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0x31: {
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'fmt': [
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'read security memory',
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'RD-S',
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],
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'len': 4,
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},
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0x33: {
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'fmt': [
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'compare verification data, addr {addr:02x}, data {data:02x}',
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'CMP-V @{addr:02x} ={data:02x}',
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],
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'proc': True,
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},
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0x34: {
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'fmt': [
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'read protection memory, addr {addr:02x}',
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'RD-P @{addr:02x}',
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],
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'len': 4,
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},
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0x38: {
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'fmt': [
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'update main memory, addr {addr:02x}, data {data:02x}',
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'WR-M @{addr:02x} ={data:02x}',
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],
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'proc': True,
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},
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0x39: {
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'fmt': [
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'update security memory, addr {addr:02x}, data {data:02x}',
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'WR-S @{addr:02x} ={data:02x}',
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],
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'proc': True,
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},
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0x3c: {
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'fmt': [
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'write protection memory, addr {addr:02x}, data {data:02x}',
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'WR-P @{addr:02x} ={data:02x}',
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],
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'proc': True,
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},
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}
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code = codes_table.get(ctrl, {})
|
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dflt_fmt = [
|
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'unknown, ctrl {ctrl:02x}, addr {addr:02x}, data {data:02x}',
|
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'UNK-{ctrl:02x} @{addr:02x}, ={data:02x}',
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]
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fmt = code.get('fmt', dflt_fmt)
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if not isinstance(fmt, (list, tuple,)):
|
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fmt = [fmt,]
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texts = [f.format(ctrl = ctrl, addr = addr, data = data) for f in fmt]
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length = code.get('len', None)
|
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if callable(length):
|
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length = length(ctrl, addr, data)
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is_proc = code.get('proc', False)
|
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return texts, length, is_proc
|
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|
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def processing_start(self, ss, es, io_high):
|
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self.proc_state = {
|
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'ss': ss or es,
|
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'es': es or ss,
|
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'clk': 0,
|
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'io1': bool(io_high),
|
||||
}
|
||||
|
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def processing_update(self, es, clk_inc, io_high):
|
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if es is not None and es > self.proc_state['es']:
|
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self.proc_state['es'] = es
|
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self.proc_state['clk'] += clk_inc
|
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if io_high:
|
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self.proc_state['io1'] = True
|
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|
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def handle_data_byte(self, ss, es, data, bits):
|
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'''Accumulate CMD or OUT data bytes.'''
|
||||
|
||||
if self.state == 'ATR':
|
||||
if not self.atr_bytes:
|
||||
self.atr_bytes = []
|
||||
self.atr_bytes.append([data, ss, es, bits,])
|
||||
if len(self.atr_bytes) == 4:
|
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self.flush_queued()
|
||||
return
|
||||
|
||||
if self.state == 'CMD':
|
||||
if not self.cmd_bytes:
|
||||
self.cmd_bytes = []
|
||||
self.cmd_bytes.append([data, ss, es, bits,])
|
||||
if len(self.cmd_bytes) == 3:
|
||||
ctrl, addr, data = [c[0] for c in self.cmd_bytes]
|
||||
texts, length, proc = self.command_check(ctrl, addr, data)
|
||||
# Immediately emit the annotation to not lose the text,
|
||||
# and to support zoom levels for this specific case.
|
||||
ss, es = self.cmd_bytes[0][1], self.cmd_bytes[-1][2]
|
||||
cls = Ann.CMD_DATA
|
||||
self.putx(ss, es, cls, texts)
|
||||
self.cmd_bytes = []
|
||||
# Prepare to continue either at OUT or PROC after CMD.
|
||||
self.out_len = length
|
||||
self.cmd_proc = bool(proc)
|
||||
self.state = None
|
||||
return
|
||||
|
||||
if self.state == 'OUT':
|
||||
if not self.out_bytes:
|
||||
self.out_bytes = []
|
||||
self.out_bytes.append([data, ss, es, bits,])
|
||||
if self.out_len is not None and len(self.out_bytes) == self.out_len:
|
||||
self.flush_queued()
|
||||
return
|
||||
|
||||
def handle_data_bit(self, ss, es, bit):
|
||||
'''Gather 8 bits of data (or track processing progress).'''
|
||||
|
||||
# Switch late from DATA to either OUT or PROC. We can tell the
|
||||
# type and potentially fixed length at the end of CMD already,
|
||||
# but a START/STOP condition may void this information. So we
|
||||
# do the switch at the first data bit after CMD.
|
||||
# In the OUT case data bytes get accumulated, until either the
|
||||
# expected byte count is reached, or another CMD starts. In the
|
||||
# PROC case a high I/O level terminates execution.
|
||||
if self.state == 'DATA':
|
||||
if self.out_len:
|
||||
self.state = 'OUT'
|
||||
elif self.cmd_proc:
|
||||
self.state = 'PROC'
|
||||
self.processing_start(ss or es, es or ss, bit == 1)
|
||||
else:
|
||||
# Implementor's note: Handle unknown situations like
|
||||
# outgoing data bytes, for the user's convenience. This
|
||||
# will show OUT bytes even if it's just processing CLK
|
||||
# cycles with constant or irrelevant I/O bit patterns.
|
||||
self.state = 'OUT'
|
||||
if self.state == 'PROC':
|
||||
high = bit == 1
|
||||
if ss is not None:
|
||||
self.processing_update(ss, 0, high)
|
||||
if es is not None:
|
||||
self.processing_update(es, 1, high)
|
||||
if high:
|
||||
self.flush_queued()
|
||||
return
|
||||
|
||||
# This routine gets called two times per bit value. Track the
|
||||
# bit's value and ss timestamp when the bit period starts. And
|
||||
# update the es timestamp at the end of the bit's validity.
|
||||
if ss is not None:
|
||||
self.bits.append([bit, ss, es or ss])
|
||||
return
|
||||
if es is None:
|
||||
# Unexpected invocation. Could be a glitch or invalid input
|
||||
# data, or an interaction with RESET/START/STOP conditions.
|
||||
self.bits = []
|
||||
return
|
||||
if not self.bits:
|
||||
return
|
||||
if bit is not None:
|
||||
self.bits[-1][0] = bit
|
||||
# TODO Check for consistent bit level at ss and es when
|
||||
# the information was available? Is bit data sampled at
|
||||
# different clock edges depending whether data is sent
|
||||
# or received?
|
||||
self.bits[-1][2] = es
|
||||
# Emit the bit's annotation. See if a byte was received.
|
||||
bit, ss, es = self.bits[-1]
|
||||
cls, texts = self.lookup_proto_ann_txt('BIT_SYM', {'bit': bit})
|
||||
self.putx(ss, es, cls, texts)
|
||||
if len(self.bits) < 8:
|
||||
return
|
||||
|
||||
# Get the data byte value, and the byte's ss/es. Emit the byte's
|
||||
# annotation and binary output. Pass the byte to upper layers.
|
||||
# TODO Vary annotation classes with the byte's position within
|
||||
# a field? To tell CTRL/ADDR/DATA of a CMD entry apart?
|
||||
bits = self.bits
|
||||
self.bits = []
|
||||
data = bitpack_lsb(bits, 0)
|
||||
ss = bits[0][1]
|
||||
es = bits[-1][2]
|
||||
|
||||
key = '{}_BYTE'.format(self.state)
|
||||
cls, texts = self.lookup_proto_ann_txt(key, {'data': data})
|
||||
if cls:
|
||||
self.putx(ss, es, cls, texts)
|
||||
self.putb(ss, es, Bin.BYTES, bytes([data]))
|
||||
|
||||
self.handle_data_byte(ss, es, data, bits)
|
||||
|
||||
def decode(self):
|
||||
'''Decoder's main data interpretation loop.'''
|
||||
|
||||
# Signal conditions tracked by the protocol decoder:
|
||||
# - Rising and falling RST edges, which span the width of a
|
||||
# high-active RESET pulse. RST has highest priority, no
|
||||
# other activity can take place in this period.
|
||||
# - Rising and falling CLK edges when RST is active. The
|
||||
# CLK pulse when RST is asserted will reset the card's
|
||||
# address counter. RST alone can terminate memory reads.
|
||||
# - Rising and falling CLK edges when RST is inactive. This
|
||||
# determines the period where BIT values are valid.
|
||||
# - I/O edges during high CLK. These are START and STOP
|
||||
# conditions that tell COMMAND and DATA phases apart.
|
||||
# - Rise of I/O during internal processing. This expression
|
||||
# is an unconditional part of the .wait() condition set. It
|
||||
# is assumed that skipping this match in many cases is more
|
||||
# efficient than the permanent re-construction of the .wait()
|
||||
# condition list in every loop iteration, and preferrable to
|
||||
# the maintainance cost of duplicating RST and CLK handling
|
||||
# when checking I/O during internal processing.
|
||||
(
|
||||
COND_RESET_START, COND_RESET_STOP,
|
||||
COND_RSTCLK_START, COND_RSTCLK_STOP,
|
||||
COND_DATA_START, COND_DATA_STOP,
|
||||
COND_CMD_START, COND_CMD_STOP,
|
||||
COND_PROC_IOH,
|
||||
) = range(9)
|
||||
conditions = [
|
||||
{Pin.RST: 'r'},
|
||||
{Pin.RST: 'f'},
|
||||
{Pin.RST: 'h', Pin.CLK: 'r'},
|
||||
{Pin.RST: 'h', Pin.CLK: 'f'},
|
||||
{Pin.RST: 'l', Pin.CLK: 'r'},
|
||||
{Pin.RST: 'l', Pin.CLK: 'f'},
|
||||
{Pin.CLK: 'h', Pin.IO: 'f'},
|
||||
{Pin.CLK: 'h', Pin.IO: 'r'},
|
||||
{Pin.RST: 'l', Pin.IO: 'r'},
|
||||
]
|
||||
|
||||
ss_reset = es_reset = ss_clk = es_clk = None
|
||||
while True:
|
||||
|
||||
is_outgoing = self.state == 'OUT'
|
||||
is_processing = self.state == 'PROC'
|
||||
pins = self.wait(conditions)
|
||||
io = pins[Pin.IO]
|
||||
|
||||
# Handle RESET conditions, including an optional CLK pulse
|
||||
# while RST is asserted.
|
||||
if self.matched[COND_RESET_START]:
|
||||
self.flush_queued()
|
||||
ss_reset = self.samplenum
|
||||
es_reset = ss_clk = es_clk = None
|
||||
continue
|
||||
if self.matched[COND_RESET_STOP]:
|
||||
es_reset = self.samplenum
|
||||
self.handle_reset(ss_reset or 0, es_reset, ss_clk and es_clk)
|
||||
ss_reset = es_reset = ss_clk = es_clk = None
|
||||
continue
|
||||
if self.matched[COND_RSTCLK_START]:
|
||||
ss_clk = self.samplenum
|
||||
es_clk = None
|
||||
continue
|
||||
if self.matched[COND_RSTCLK_STOP]:
|
||||
es_clk = self.samplenum
|
||||
continue
|
||||
|
||||
# Handle data bits' validity boundaries. Also covers the
|
||||
# periodic check for high I/O level and update of details
|
||||
# during internal processing.
|
||||
if self.matched[COND_DATA_START]:
|
||||
self.handle_data_bit(self.samplenum, None, io)
|
||||
continue
|
||||
if self.matched[COND_DATA_STOP]:
|
||||
self.handle_data_bit(None, self.samplenum, None)
|
||||
continue
|
||||
|
||||
# Additional check for idle I/O during internal processing,
|
||||
# independent of CLK edges this time. This assures that the
|
||||
# decoder ends processing intervals as soon as possible, at
|
||||
# the most precise timestamp.
|
||||
if is_processing and self.matched[COND_PROC_IOH]:
|
||||
self.handle_data_bit(self.samplenum, self.samplenum, io)
|
||||
continue
|
||||
|
||||
# The START/STOP conditions are only applicable outside of
|
||||
# "outgoing data" or "internal processing" periods. This is
|
||||
# what the data sheet specifies.
|
||||
if not is_outgoing and not is_processing:
|
||||
if self.matched[COND_CMD_START]:
|
||||
self.handle_command(self.samplenum, True)
|
||||
continue
|
||||
if self.matched[COND_CMD_STOP]:
|
||||
self.handle_command(self.samplenum, False)
|
||||
continue
|
||||
Reference in New Issue
Block a user