SW/DSView
2
0
Fork 0
forked from Ivasoft/DSView
Code Pull Requests Activity

Merge from the last commit of release-1.2.2 branch

Browse Source
This commit is contained in:
dreamsourcelabTAI
2023-01-11 15:46:12 +08:00
parent 489eb57f47
commit 30faa3a6c5
6 changed files with 15 additions and 36 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
libsigrok4DSL/hardware/DSL/dsl.c
View File

@@ -35,7 +35,6 @@ SR_PRIV int dsl_secuWrite(const struct sr_dev_inst *sdi, uint16_t cmd, uint16_t
SR_PRIV gboolean dsl_isSecuReady(const struct sr_dev_inst *sdi);
SR_PRIV gboolean dsl_isSecuPass(const struct sr_dev_inst *sdi);
SR_PRIV uint16_t dsl_secuRead(const struct sr_dev_inst *sdi);
SR_PRIV int dsl_secuCheck(const struct sr_dev_inst *sdi, uint16_t* encryption, int steps);
static const int32_t probeOptions[] = {
SR_CONF_PROBE_COUPLING,

2
libsigrok4DSL/hardware/DSL/dsl.h
View File

@@ -1356,4 +1356,6 @@ SR_PRIV int dsl_header_size(const struct DSL_context *devc);
SR_PRIV int dsl_destroy_device(const struct sr_dev_inst *sdi);
SR_PRIV int dsl_secuCheck(const struct sr_dev_inst *sdi, uint16_t* encryption, int steps);
#endif

13
libsigrok4DSL/hardware/DSL/dslogic.c
View File

@@ -1090,7 +1090,11 @@ static int config_set(int id, GVariant *data, struct sr_dev_inst *sdi,
}
else if (id == SR_CONF_VTH) {
devc->vth = g_variant_get_double(data);
ret = dsl_wr_reg(sdi, VTH_ADDR, (uint8_t)(devc->vth/5.0*255));
if (devc->profile->dev_caps.feature_caps & CAPS_FEATURE_MAX25_VTH)
ret = dsl_wr_reg(sdi, VTH_ADDR, (uint8_t)(devc->vth/5.0*(2.5/3.3)*255));
else
ret = dsl_wr_reg(sdi, VTH_ADDR, (uint8_t)(devc->vth/5.0*255));
}
else if (id == SR_CONF_MAX_HEIGHT) {
stropt = g_variant_get_string(data, NULL);
@@ -1255,9 +1259,12 @@ static int dev_open(struct sr_dev_inst *sdi)
devc = sdi->priv;
if ((ret = dsl_dev_open(di, sdi, &fpga_done)) == SR_OK) {
if ((ret = dsl_dev_open(di, sdi, &fpga_done)) == SR_OK) {
if (devc->profile->dev_caps.feature_caps & CAPS_FEATURE_MAX25_VTH)
ret = dsl_wr_reg(sdi, VTH_ADDR, (uint8_t)(devc->vth/5.0*(2.5/3.3)*255));
else
ret = dsl_wr_reg(sdi, VTH_ADDR, (uint8_t)(devc->vth/5.0*255));
// set threshold
ret = dsl_wr_reg(sdi, VTH_ADDR, (uint8_t)(devc->vth/5.0*255));
if (devc->profile->dev_caps.feature_caps & CAPS_FEATURE_ADF4360) {
dsl_config_adc(sdi, adc_clk_init_500m);
}