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Merge from the last commit of release-1.2.2 branch

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dreamsourcelabTAI
2023-01-11 15:46:12 +08:00
parent 489eb57f47
commit 30faa3a6c5
6 changed files with 15 additions and 36 deletions
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25
DSView/pv/mainwindow.cpp
View File

@@ -239,8 +239,8 @@ namespace pv
connect(&_event, SIGNAL(session_error()), this, SLOT(on_session_error()));
connect(&_event, SIGNAL(signals_changed()), this, SLOT(on_signals_changed()));
connect(&_event, SIGNAL(receive_trigger(quint64)), this, SLOT(on_receive_trigger(quint64)));
connect(&_event, SIGNAL(frame_ended()), this, SLOT(on_frame_ended()));
connect(&_event, SIGNAL(frame_began()), this, SLOT(on_frame_began()));
connect(&_event, SIGNAL(frame_ended()), this, SLOT(on_frame_ended()), Qt::DirectConnection);
connect(&_event, SIGNAL(frame_began()), this, SLOT(on_frame_began()), Qt::DirectConnection);
connect(&_event, SIGNAL(decode_done()), this, SLOT(on_decode_done()));
connect(&_event, SIGNAL(data_updated()), this, SLOT(on_data_updated()));
connect(&_event, SIGNAL(cur_snap_samplerate_changed()), this, SLOT(on_cur_snap_samplerate_changed()));
@@ -362,27 +362,6 @@ namespace pv
details = L_S(STR_PAGE_MSG, S_ID(IDS_MSG_MALLOC_ERROR_DET),
"Memory is not enough for this sample!\nPlease reduce the sample depth!");
break;
case SigSession::Test_data_err:
_session->stop_capture();
update_toolbar_view_status();
title = L_S(STR_PAGE_MSG, S_ID(IDS_DATA_ERROR), "Data Error");
error_pattern = _session->get_error_pattern();
for (int i = 0; i < 16; i++)
{
if (error_pattern & 0x01)
ch_status += "X ";
else
ch_status += " ";
ch_status += (i > 9 ? " " : "");
error_pattern >>= 1;
}
details = QString(L_S(STR_PAGE_MSG, S_ID(IDS_DATA_ERROR_DET1),"the received data are not consist with pre-defined test data!")) + "\n" +
QString("0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15") + "\n" +
ch_status;
break;
case SigSession::Pkt_data_err:
title = L_S(STR_PAGE_MSG, S_ID(IDS_MSG_PACKET_ERROR), "Packet Error");
details = L_S(STR_PAGE_MSG, S_ID(IDS_MSG_PACKET_ERROR_DET),

7
DSView/pv/sigsession.cpp
View File

@@ -922,13 +922,6 @@ namespace pv
void SigSession::feed_in_logic(const sr_datafeed_logic &o)
{
if (o.data_error == 1)
{
_error = Test_data_err;
_error_pattern = o.error_pattern;
_callback->session_error();
}
if (_view_data->get_logic()->memory_failed())
{
dsv_err("%s", "Unexpected logic packet");

3
DSView/pv/sigsession.h
View File

@@ -131,8 +131,7 @@ public:
enum SESSION_ERROR_STATUS {
No_err,
Hw_err,
Malloc_err,
Test_data_err,
Malloc_err,
Test_timeout_err,
Pkt_data_err,
Data_overflow

1
libsigrok4DSL/hardware/DSL/dsl.c
View File

@@ -35,7 +35,6 @@ SR_PRIV int dsl_secuWrite(const struct sr_dev_inst *sdi, uint16_t cmd, uint16_t
SR_PRIV gboolean dsl_isSecuReady(const struct sr_dev_inst *sdi);
SR_PRIV gboolean dsl_isSecuPass(const struct sr_dev_inst *sdi);
SR_PRIV uint16_t dsl_secuRead(const struct sr_dev_inst *sdi);
SR_PRIV int dsl_secuCheck(const struct sr_dev_inst *sdi, uint16_t* encryption, int steps);
static const int32_t probeOptions[] = {
SR_CONF_PROBE_COUPLING,

2
libsigrok4DSL/hardware/DSL/dsl.h
View File

@@ -1356,4 +1356,6 @@ SR_PRIV int dsl_header_size(const struct DSL_context *devc);
SR_PRIV int dsl_destroy_device(const struct sr_dev_inst *sdi);
SR_PRIV int dsl_secuCheck(const struct sr_dev_inst *sdi, uint16_t* encryption, int steps);
#endif

13
libsigrok4DSL/hardware/DSL/dslogic.c
View File

@@ -1090,7 +1090,11 @@ static int config_set(int id, GVariant *data, struct sr_dev_inst *sdi,
}
else if (id == SR_CONF_VTH) {
devc->vth = g_variant_get_double(data);
ret = dsl_wr_reg(sdi, VTH_ADDR, (uint8_t)(devc->vth/5.0*255));
if (devc->profile->dev_caps.feature_caps & CAPS_FEATURE_MAX25_VTH)
ret = dsl_wr_reg(sdi, VTH_ADDR, (uint8_t)(devc->vth/5.0*(2.5/3.3)*255));
else
ret = dsl_wr_reg(sdi, VTH_ADDR, (uint8_t)(devc->vth/5.0*255));
}
else if (id == SR_CONF_MAX_HEIGHT) {
stropt = g_variant_get_string(data, NULL);
@@ -1255,9 +1259,12 @@ static int dev_open(struct sr_dev_inst *sdi)
devc = sdi->priv;
if ((ret = dsl_dev_open(di, sdi, &fpga_done)) == SR_OK) {
if ((ret = dsl_dev_open(di, sdi, &fpga_done)) == SR_OK) {
if (devc->profile->dev_caps.feature_caps & CAPS_FEATURE_MAX25_VTH)
ret = dsl_wr_reg(sdi, VTH_ADDR, (uint8_t)(devc->vth/5.0*(2.5/3.3)*255));
else
ret = dsl_wr_reg(sdi, VTH_ADDR, (uint8_t)(devc->vth/5.0*255));
// set threshold
ret = dsl_wr_reg(sdi, VTH_ADDR, (uint8_t)(devc->vth/5.0*255));
if (devc->profile->dev_caps.feature_caps & CAPS_FEATURE_ADF4360) {
dsl_config_adc(sdi, adc_clk_init_500m);
}