openwrt/target/linux/lantiq/files/arch/mips/boot/dts/FRITZ3370-REV2.dtsi

#include "vr9.dtsi"

#include <dt-bindings/input/input.h>
#include <dt-bindings/mips/lantiq_rcu_gphy.h>

/ {
	compatible = "avm,fritz3370-rev2", "lantiq,xway", "lantiq,vr9";
	model = "AVM FRITZ!Box 3370 Rev. 2";

	chosen {
		bootargs = "console=ttyLTQ0,115200";
	};

	aliases {
		led-boot = &power_green;
		led-failsafe = &power_red;
		led-running = &power_green;
		led-upgrade = &power_green;

		led-dsl = &dsl;
		led-internet = &info_green;
		led-wifi = &wifi;
	};

	memory@0 {
		reg = <0x0 0x8000000>;
	};

	gpio-poweroff {
		compatible = "gpio-poweroff";
		gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
	};

	gpio-keys-polled {
		compatible = "gpio-keys-polled";
		#address-cells = <1>;
		#size-cells = <0>;
		poll-interval = <100>;

		power {
			label = "power";
			gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
			linux,code = <KEY_POWER>;
		};

		wifi {
			label = "wlan";
			gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
			linux,code = <KEY_WLAN>;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";

		power_green: power {
			label = "fritz3370:green:power";
			gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
			default-state = "keep";
		};

		power_red: power2 {
			label = "fritz3370:red:power";
			gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
		};

		info_red {
			label = "fritz3370:red:info";
			gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
		};

		wifi: wifi {
			label = "fritz3370:green:wlan";
			gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
		};

		dsl: dsl {
			label = "fritz3370:green:dsl";
			gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
		};

		lan {
			label = "fritz3370:green:lan";
			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
		};

		info_green: info_green {
			label = "fritz3370:green:info";
			gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
		};
	};

	usb0_vbus: regulator-usb0-vbus {
		compatible = "regulator-fixed";

		regulator-name = "USB0_VBUS";

		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;

		gpio = <&gpio 14 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	usb1_vbus: regulator-usb1-vbus {
		compatible = "regulator-fixed";

		regulator-name = "USB1_VBUS";

		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;

		gpio = <&gpio 5 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&eth0 {
	lan: interface@0 {
		compatible = "lantiq,xrx200-pdi";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0>;
		lantiq,switch;

		ethernet@0 {
			compatible = "lantiq,xrx200-pdi-port";
			reg = <0>;
			phy-mode = "rgmii";
			phy-handle = <&phy0>;
			gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
		};

		ethernet@1 {
			compatible = "lantiq,xrx200-pdi-port";
			reg = <1>;
			phy-mode = "rgmii";
			phy-handle = <&phy1>;
			gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
		};

		ethernet@2 {
			compatible = "lantiq,xrx200-pdi-port";
			reg = <2>;
			phy-mode = "gmii";
			phy-handle = <&phy11>;
		};

		ethernet@4 {
			compatible = "lantiq,xrx200-pdi-port";
			reg = <4>;
			phy-mode = "gmii";
			phy-handle = <&phy13>;
		};
	};

	mdio@0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "lantiq,xrx200-mdio";
		reg = <0>;

		phy0: ethernet-phy@0 {
			reg = <0x0>;
			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
		};

		phy1: ethernet-phy@1 {
			reg = <0x1>;
			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
		};

		phy11: ethernet-phy@11 {
			reg = <0x11>;
			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
		};

		phy13: ethernet-phy@13 {
			reg = <0x13>;
			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
		};
	};
};

&gphy0 {
	lantiq,gphy-mode = <GPHY_MODE_GE>;
};

&gphy1 {
	lantiq,gphy-mode = <GPHY_MODE_GE>;
};

&gpio {
	pinctrl-names = "default";
	pinctrl-0 = <&state_default>;

	state_default: pinmux {
		mdio {
			lantiq,groups = "mdio";
			lantiq,function = "mdio";
		};

		nand {
			lantiq,groups = "nand cle", "nand ale",
					"nand rd", "nand cs1", "nand rdy";
			lantiq,function = "ebu";
			lantiq,pull = <1>;
		};

		phy-rst {
			lantiq,pins = "io37", "io44";
			lantiq,pull = <0>;
			lantiq,open-drain = <0>;
			lantiq,output = <1>;
		};

		pcie-rst {
			lantiq,pins = "io21";
			lantiq,pull = <0>;
			lantiq,output = <1>;
		};
	};

	pins_spi_default: pins_spi_default {
		spi_in {
			lantiq,groups = "spi_di";
			lantiq,function = "spi";
		};

		spi_out {
			lantiq,groups = "spi_do", "spi_clk",
				"spi_cs4";
			lantiq,function = "spi";
			lantiq,output = <1>;
		};
	};
};

&pcie0 {
	gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;

	pcie@0 {
		reg = <0 0 0 0 0>;
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		device_type = "pci";

		wifi@0,0 {
			compatible = "pci0,0";
			reg = <0 0 0 0 0>;
			qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
		};
	};
};

&spi {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&pins_spi_default>;

	m25p80@4 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		reg = <4 0>;
		spi-max-frequency = <1000000>;

		urlader: partition@0 {
			reg = <0x0 0x20000>;
			label = "urlader";
			read-only;
		};

		partition@20000 {
			reg = <0x20000 0x10000>;
			label = "tffs (1)";
			read-only;
		};

		partition@30000 {
			reg = <0x30000 0x10000>;
			label = "tffs (2)";
			read-only;
		};
	};
};

&usb_phy0 {
	status = "okay";
};

&usb_phy1 {
	status = "okay";
};

&usb0 {
	status = "okay";
	vbus-supply = <&usb0_vbus>;
};

&usb1 {
	status = "okay";
	vbus-supply = <&usb1_vbus>;
};