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lantiq: kernel 4.14: cleanup dts files

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Move common used parts to dtsi. Add labels to nodes and reference nodes
via labels in dts files.

Signed-off-by: Mathias Kresin <dev@kresin.me>
This commit is contained in:
Mathias Kresin
2018-01-01 17:58:30 +01:00
parent 82ae68be70
commit f519fea4c6
55 changed files with 4058 additions and 4219 deletions
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209
target/linux/lantiq/files-4.14/arch/mips/boot/dts/WBMR300.dts
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@@ -26,54 +26,6 @@
reg = <0x0 0x4000000>;
};
fpi@10000000 {
gpio: pinmux@E100B10 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
phy-rst {
lantiq,pins = "io42";
lantiq,pull = <0>;
lantiq,open-drain = <0>;
lantiq,output = <1>;
};
pcie-rst {
lantiq,pins = "io38";
lantiq,pull = <0>;
lantiq,output = <1>;
};
};
pins_spi_default: pins_spi_default {
spi_in {
lantiq,groups = "spi_di";
lantiq,function = "spi";
};
spi_out {
lantiq,groups = "spi_do", "spi_clk",
"spi_cs4";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
};
ifxhcd@E101000 {
status = "okay";
gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
lantiq,portmask = <0x3>;
};
ifxhcd@E106000 {
status = "okay";
gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
};
};
gphy-xrx200 {
compatible = "lantiq,phy-xrx200";
firmware = "lantiq/xrx200_phy22f_a22.bin";
@@ -195,11 +147,106 @@
};
};
&eth0 {
lan: interface@0 {
compatible = "lantiq,xrx200-pdi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
lantiq,switch;
ethernet@1 {
compatible = "lantiq,xrx200-pdi-port";
reg = <4>;
phy-mode = "mii";
phy-handle = <&phy13>;
};
ethernet@2 {
compatible = "lantiq,xrx200-pdi-port";
reg = <5>;
phy-mode = "mii";
phy-handle = <&phy14>;
};
ethernet@3 {
compatible = "lantiq,xrx200-pdi-port";
reg = <2>;
phy-mode = "mii";
phy-handle = <&phy11>;
};
ethernet@4 {
compatible = "lantiq,xrx200-pdi-port";
reg = <3>;
phy-mode = "mii";
phy-handle = <&phy12>;
};
};
mdio@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "lantiq,xrx200-mdio";
reg = <0>;
phy11: ethernet-phy@11 {
reg = <0x11>;
compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
};
phy12: ethernet-phy@12 {
reg = <0x12>;
compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
};
phy13: ethernet-phy@13 {
reg = <0x13>;
compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
};
phy14: ethernet-phy@14 {
reg = <0x14>;
compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
};
};
};
&gpio {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
phy-rst {
lantiq,pins = "io42";
lantiq,pull = <0>;
lantiq,open-drain = <0>;
lantiq,output = <1>;
};
pcie-rst {
lantiq,pins = "io38";
lantiq,pull = <0>;
lantiq,output = <1>;
};
};
pins_spi_default: pins_spi_default {
spi_in {
lantiq,groups = "spi_di";
lantiq,function = "spi";
};
spi_out {
lantiq,groups = "spi_do", "spi_clk",
"spi_cs4";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
};
&spi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pins_spi_default>;
status = "ok";
m25p80@4 {
#address-cells = <1>;
#size-cells = <1>;
@@ -248,59 +295,13 @@
};
};
&eth0 {
lan: interface@0 {
compatible = "lantiq,xrx200-pdi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
lantiq,switch;
ethernet@1 {
compatible = "lantiq,xrx200-pdi-port";
reg = <4>;
phy-mode = "mii";
phy-handle = <&phy13>;
};
ethernet@2 {
compatible = "lantiq,xrx200-pdi-port";
reg = <5>;
phy-mode = "mii";
phy-handle = <&phy14>;
};
ethernet@3 {
compatible = "lantiq,xrx200-pdi-port";
reg = <2>;
phy-mode = "mii";
phy-handle = <&phy11>;
};
ethernet@4 {
compatible = "lantiq,xrx200-pdi-port";
reg = <3>;
phy-mode = "mii";
phy-handle = <&phy12>;
};
};
mdio@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "lantiq,xrx200-mdio";
phy11: ethernet-phy@11 {
reg = <0x11>;
compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
};
phy12: ethernet-phy@12 {
reg = <0x12>;
compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
};
phy13: ethernet-phy@13 {
reg = <0x13>;
compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
};
phy14: ethernet-phy@14 {
reg = <0x14>;
compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
};
};
&usb0 {
status = "okay";
gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
lantiq,portmask = <0x3>;
};
&usb1 {
status = "okay";
gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
};