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Revert "ar71xx: Allow to set the RXDV, RXD, TXD, TXE delays for QCA955x"

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The default delays RXD 3. RDV 3, TXD 0, TXE 0 doesn't seem to work for some
boards. These boards depend on the preset values of u-boot which may
differ.

This reverts commit f2d4bb96b62512caa161dcc2867c91692fb16a38.

Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>

SVN-Revision: 49071
This commit is contained in:
John Crispin
2016-03-23 12:52:17 +00:00
parent 26d18d4e07
commit b269a3520d
17 changed files with 19 additions and 29 deletions
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12
target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
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@@ -830,9 +830,7 @@ void __init ath79_setup_ar934x_eth_rx_delay(unsigned int rxd,
iounmap(base);
}
void __init ath79_setup_qca955x_eth_cfg(u32 mask,
unsigned int rxd, unsigned int rxdv,
unsigned int txd, unsigned int txe)
void __init ath79_setup_qca955x_eth_cfg(u32 mask)
{
void __iomem *base;
u32 t, m;
@@ -847,10 +845,6 @@ void __init ath79_setup_qca955x_eth_cfg(u32 mask,
QCA955X_ETH_CFG_RMII_GE0 |
QCA955X_ETH_CFG_MII_CNTL_SPEED |
QCA955X_ETH_CFG_RMII_GE0_MASTER;
m |= QCA955X_ETH_CFG_RXD_DELAY_MASK << QCA955X_ETH_CFG_RXD_DELAY_SHIFT;
m |= QCA955X_ETH_CFG_RDV_DELAY_MASK << QCA955X_ETH_CFG_RDV_DELAY_SHIFT;
m |= QCA955X_ETH_CFG_TXD_DELAY_MASK << QCA955X_ETH_CFG_TXD_DELAY_SHIFT;
m |= QCA955X_ETH_CFG_TXE_DELAY_MASK << QCA955X_ETH_CFG_TXE_DELAY_SHIFT;
base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
@@ -858,10 +852,6 @@ void __init ath79_setup_qca955x_eth_cfg(u32 mask,
t &= ~m;
t |= mask;
t |= rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT;
t |= rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT;
t |= txd << QCA955X_ETH_CFG_TXD_DELAY_SHIFT;
t |= txe << QCA955X_ETH_CFG_TXE_DELAY_SHIFT;
__raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);