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ath79: ag71xx: remove PHY reset

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Bit 8/12 of reset controller which is marked as PHY_RESET/SWITCH_RESET
in datasheets will trigger either a reset for builtin switch or assert
an external ETH0_RESET_L/ETH1_RESET_L pin, which are usually connected
to external PHY/switch. None of them should be triggered every time an
interface is brought up in ethernet driver.

Remove PHY reset support from ag71xx and definition for them in dtsi.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This commit is contained in:
Chuanhong Guo
2018-08-07 12:02:07 +08:00
committed by Mathias Kresin
parent 23519edbca
commit 387736af41
6 changed files with 6 additions and 22 deletions
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1
target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h
View File

@@ -186,7 +186,6 @@ struct ag71xx {
struct timer_list oom_timer;
struct reset_control *mac_reset;
struct reset_control *phy_reset;
u32 fifodata[3];
u32 plldata[3];

9
target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
View File

@@ -423,13 +423,6 @@ static void ag71xx_hw_init(struct ag71xx *ag)
{
ag71xx_hw_stop(ag);
if (ag->phy_reset) {
reset_control_assert(ag->phy_reset);
msleep(50);
reset_control_deassert(ag->phy_reset);
msleep(200);
}
ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR);
udelay(20);
@@ -1313,8 +1306,6 @@ static int ag71xx_probe(struct platform_device *pdev)
goto err_free;
}
ag->phy_reset = devm_reset_control_get_optional(&pdev->dev, "phy");
if (of_property_read_u32_array(np, "fifo-data", ag->fifodata, 3)) {
if (of_device_is_compatible(np, "qca,ar9130-eth") ||
of_device_is_compatible(np, "qca,ar7100-eth")) {