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Added and fixed support for XN297 decoding.

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This commit is contained in:
Richard Li
2020-08-14 15:35:43 +08:00
parent de9aa55873
commit f70de5abe8
1 changed files with 33 additions and 10 deletions
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43
libsigrokdecode4DSL/decoders/nrf24l01/pd.py
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@@ -54,8 +54,10 @@ regs = {
} }
xn297_regs = { xn297_regs = {
0x19: ('DEMOD_CAL', 5), 0x19: ('DEMOD_CAL', 1),
0x1e: ('RF_CAL', 7), 0x1a: ('RF_CAL2', 6),
0x1b: ('DEM_CAL2', 3),
0x1e: ('RF_CAL', 3),
0x1f: ('BB_CAL', 5), 0x1f: ('BB_CAL', 5),
} }
@@ -153,7 +155,7 @@ class Decoder(srd.Decoder):
self.cmd, self.dat, self.min, self.max = c self.cmd, self.dat, self.min, self.max = c
if self.cmd in ('W_REGISTER', 'ACTIVATE'): if self.cmd in ('W_REGISTER', 'ACTIVATE', 'RST_FSPI'):
# Don't output anything now, the command is merged with # Don't output anything now, the command is merged with
# the data bytes following it. # the data bytes following it.
self.mb_s = pos[0] self.mb_s = pos[0]
@@ -177,7 +179,9 @@ class Decoder(srd.Decoder):
- minimum number of following bytes - minimum number of following bytes
- maximum number of following bytes - maximum number of following bytes
''' '''
buflen = 32
if self.options['chip'] == 'xn297':
buglen = 64
if (b & 0xe0) in (0b00000000, 0b00100000): if (b & 0xe0) in (0b00000000, 0b00100000):
c = 'R_REGISTER' if not (b & 0xe0) else 'W_REGISTER' c = 'R_REGISTER' if not (b & 0xe0) else 'W_REGISTER'
d = b & 0x1f d = b & 0x1f
@@ -187,15 +191,15 @@ class Decoder(srd.Decoder):
# nRF24L01 only # nRF24L01 only
return ('ACTIVATE', None, 1, 1) return ('ACTIVATE', None, 1, 1)
if b == 0b01100001: if b == 0b01100001:
return ('R_RX_PAYLOAD', None, 1, 32) return ('R_RX_PAYLOAD', None, 1, buflen)
if b == 0b01100000: if b == 0b01100000:
return ('R_RX_PL_WID', None, 1, 1) return ('R_RX_PL_WID', None, 1, 1)
if b == 0b10100000: if b == 0b10100000:
return ('W_TX_PAYLOAD', None, 1, 32) return ('W_TX_PAYLOAD', None, 1, buflen)
if b == 0b10110000: if b == 0b10110000:
return ('W_TX_PAYLOAD_NOACK', None, 1, 32) return ('W_TX_PAYLOAD_NOACK', None, 1, buflen)
if (b & 0xf8) == 0b10101000: if (b & 0xf8) == 0b10101000:
return ('W_ACK_PAYLOAD', b & 0x07, 1, 32) return ('W_ACK_PAYLOAD', b & 0x07, 1, buflen)
if b == 0b11100001: if b == 0b11100001:
return ('FLUSH_TX', None, 0, 0) return ('FLUSH_TX', None, 0, 0)
if b == 0b11100010: if b == 0b11100010:
@@ -205,6 +209,14 @@ class Decoder(srd.Decoder):
if b == 0b11111111: if b == 0b11111111:
return ('NOP', None, 0, 0) return ('NOP', None, 0, 0)
if self.options['chip'] == 'xn297':
if b == 0b11111101:
return ('CE_FSPI_ON', None, 1, 1)
if b == 0b11111100:
return ('CE_FSPI_OFF', None, 1, 1)
if b == 0b01010011:
return ('RST_FSPI', None, 1, 1)
def decode_register(self, pos, ann, regid, data): def decode_register(self, pos, ann, regid, data):
'''Decodes a register. '''Decodes a register.
@@ -280,9 +292,20 @@ class Decoder(srd.Decoder):
msg = 'Payload width = {}'.format(self.mb[0][1]) msg = 'Payload width = {}'.format(self.mb[0][1])
self.putp(pos, self.ann_reg, msg) self.putp(pos, self.ann_reg, msg)
elif self.cmd == 'ACTIVATE': elif self.cmd == 'ACTIVATE':
self.putp(pos, self.ann_cmd, self.format_command()) if self.mosi_bytes()[0] == 0x8c:
if self.mosi_bytes()[0] != 0x73: self.cmd = 'DEACTIVATE'
elif self.mosi_bytes()[0] != 0x73:
self.warn(pos, 'wrong data for "ACTIVATE" command') self.warn(pos, 'wrong data for "ACTIVATE" command')
self.putp(pos, self.ann_cmd, self.format_command())
elif self.cmd == 'RST_FSPI':
if self.mosi_bytes()[0] == 0x5a:
self.cmd = 'RST_FSPI_HOLD'
elif self.mosi_bytes()[0] == 0xa5:
self.cmd = 'RST_FSPI_RELS'
else:
self.warn(pos, 'wrong data for "RST_FSPI" command')
self.putp(pos, self.ann_cmd, self.format_command())
def decode(self, ss, es, data): def decode(self, ss, es, data):
if not self.requirements_met: if not self.requirements_met: