forked from Ivasoft/DSView
Improve usb transfer and othre minor issues
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35
libsigrokdecode4DSL/decoders/parallel/__init__.py
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35
libsigrokdecode4DSL/decoders/parallel/__init__.py
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##
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## This file is part of the libsigrokdecode project.
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##
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## Copyright (C) 2013 Uwe Hermann <uwe@hermann-uwe.de>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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'''
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This protocol decoder can decode synchronous parallel buses with various
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number of data bits/channels and one (optional) clock line.
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If no clock line is supplied, the decoder works slightly differently in
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that it interprets every transition on any of the supplied data channels
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like there had been a clock transition.
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It is required to use the lowest data channels, and use consecutive ones.
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For example, for a 4-bit sync parallel bus, channels D0/D1/D2/D3 (and CLK)
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should be used. Using combinations like D7/D12/D3/D15 is not supported.
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For an 8-bit bus you should use D0-D7, for a 16-bit bus use D0-D15 and so on.
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'''
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from .pd import Decoder
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