diff --git a/libsigrokdecode4DSL/decoders/0-i2c/pd.py b/libsigrokdecode4DSL/decoders/0-i2c/pd.py
index c9251dbe..8cb47ee0 100755
--- a/libsigrokdecode4DSL/decoders/0-i2c/pd.py
+++ b/libsigrokdecode4DSL/decoders/0-i2c/pd.py
@@ -249,6 +249,12 @@ class Decoder(srd.Decoder):
                 elif (self.matched & (0b1 << 2)):
                     self.handle_stop()
             elif self.state == 'FIND ACK':
-                # Wait for a data/ack bit: SCL = rising.
-                (scl, sda) = self.wait({0: 'r'})
-                self.get_ack(scl, sda)
+                # Wait for any of the following conditions (or combinations):
+                #  a) a data/ack bit: SCL = rising.
+                #  b) STOP condition (P): SCL = high, SDA = rising
+                (scl, sda) = self.wait([{0: 'r'}, {0: 'h', 1: 'r'}])
+                if (self.matched & (0b1 << 0)):
+                    self.get_ack(scl, sda)
+                elif (self.matched & (0b1 << 1)):
+                    self.handle_stop()
+
diff --git a/libsigrokdecode4DSL/decoders/1-i2c/pd.py b/libsigrokdecode4DSL/decoders/1-i2c/pd.py
index 3390c74f..fb6af6bb 100755
--- a/libsigrokdecode4DSL/decoders/1-i2c/pd.py
+++ b/libsigrokdecode4DSL/decoders/1-i2c/pd.py
@@ -285,6 +285,12 @@ class Decoder(srd.Decoder):
                 elif (self.matched & (0b1 << 2)):
                     self.handle_stop()
             elif self.state == 'FIND ACK':
-                # Wait for a data/ack bit: SCL = rising.
-                (scl, sda) = self.wait({0: 'r'})
-                self.get_ack(scl, sda)
+                # Wait for any of the following conditions (or combinations):
+                #  a) a data/ack bit: SCL = rising.
+                #  b) STOP condition (P): SCL = high, SDA = rising
+                (scl, sda) = self.wait([{0: 'r'}, {0: 'h', 1: 'r'}])
+                if (self.matched & (0b1 << 0)):
+                    self.get_ack(scl, sda)
+                elif (self.matched & (0b1 << 1)):
+                    self.handle_stop()
+
diff --git a/libsigrokdecode4DSL/decoders/dmx512/pd.py b/libsigrokdecode4DSL/decoders/dmx512/pd.py
index 3441166f..355095ee 100755
--- a/libsigrokdecode4DSL/decoders/dmx512/pd.py
+++ b/libsigrokdecode4DSL/decoders/dmx512/pd.py
@@ -83,12 +83,13 @@ class Decoder(srd.Decoder):
 
         inv = self.options['invert'] == 'yes'
 
+        (dmx,) = self.wait({0: 'h' if inv else 'l'})
+        self.run_start = self.samplenum
+
         while True:
             # Seek for an interval with no state change with a length between
             # 88 and 1000000 us (BREAK).
             if self.state == 'FIND BREAK':
-                (dmx,) = self.wait({0: 'h' if inv else 'l'})
-                self.run_start = self.samplenum
                 (dmx,) = self.wait({0: 'f' if inv else 'r'})
                 runlen = (self.samplenum - self.run_start) * self.sample_usec
                 if runlen > 88 and runlen < 1000000:
@@ -98,6 +99,9 @@ class Decoder(srd.Decoder):
                 elif runlen >= 1000000:
                     # Error condition.
                     self.putr([10, ['Invalid break length']])
+                else:
+                    (dmx,) = self.wait({0: 'h' if inv else 'l'})
+                    self.run_start = self.samplenum
             # Directly following the BREAK is the MARK AFTER BREAK.
             elif self.state == 'MARK MAB':
                 self.run_start = self.samplenum