From c56f7b9415956e7ab0e431b8f09d5c8ec8c1fabd Mon Sep 17 00:00:00 2001 From: yunyaobaihong <896458252@qq.com> Date: Thu, 15 Jun 2023 13:37:47 +0800 Subject: [PATCH 1/2] updata:can and can-fd protocol --- libsigrokdecode4DSL/decoders/can-fd/pd.py | 2 +- libsigrokdecode4DSL/decoders/can/pd.py | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/libsigrokdecode4DSL/decoders/can-fd/pd.py b/libsigrokdecode4DSL/decoders/can-fd/pd.py index 11f72175..151ec138 100644 --- a/libsigrokdecode4DSL/decoders/can-fd/pd.py +++ b/libsigrokdecode4DSL/decoders/can-fd/pd.py @@ -550,7 +550,7 @@ class Decoder(srd.Decoder): # State machine. if self.state == 'IDLE': # Wait for a dominant state (logic 0) on the bus. - (can_rx,) = self.wait({0: 'l'}) + (can_rx,) = self.wait({0: 'f'}) self.sof = self.samplenum self.dom_edge_seen(force = True) self.state = 'GET BITS' diff --git a/libsigrokdecode4DSL/decoders/can/pd.py b/libsigrokdecode4DSL/decoders/can/pd.py index 2e4d8597..62a0bf0f 100644 --- a/libsigrokdecode4DSL/decoders/can/pd.py +++ b/libsigrokdecode4DSL/decoders/can/pd.py @@ -42,8 +42,8 @@ class Decoder(srd.Decoder): {'id': 'can_rx', 'name': 'CAN', 'desc': 'CAN bus line', 'idn':'dec_can_chan_can_rx'}, ) options = ( - {'id': 'bitrate', 'desc': 'bitrate (bits/s)', 'default': 1000000,'idn':'dec_can_opt_bitrate'}, - {'id': 'sample_point', 'desc': 'Sample point (%)', 'default': 70.0,'idn':'dec_can_opt_sample_point'}, + {'id': 'bitrate', 'desc': 'bitrate (bits/s)', 'default': 1000000, 'idn':'dec_can_opt_bitrate'}, + {'id': 'sample_point', 'desc': 'Sample point (%)', 'default': 70.0, 'idn':'dec_can_opt_sample_point'}, ) annotations = ( ('data', 'CAN payload data'), @@ -85,7 +85,7 @@ class Decoder(srd.Decoder): def metadata(self, key, value): if key == srd.SRD_CONF_SAMPLERATE: self.samplerate = value - self.bit_width = float(self.samplerate) / float(self.options['nominal_bitrate']) + self.bit_width = float(self.samplerate) / float(self.options['bitrate']) self.sample_point = (self.bit_width / 100.0) * self.options['sample_point'] # Generic helper for CAN bit annotations. @@ -448,7 +448,7 @@ class Decoder(srd.Decoder): # State machine. if self.state == 'IDLE': # Wait for a dominant state (logic 0) on the bus. - (can_rx,) = self.wait({0: 'l'}) + (can_rx,) = self.wait({0: 'f'}) self.sof = self.samplenum self.dom_edge_seen(force = True) self.state = 'GET BITS' From a506b0572d971f237972b46d9fb116bab9a2081f Mon Sep 17 00:00:00 2001 From: yunyaobaihong <896458252@qq.com> Date: Thu, 15 Jun 2023 14:50:40 +0800 Subject: [PATCH 2/2] mipi rffe multilanguage --- libsigrokdecode4DSL/decoders/mipi_rffe/pd.py | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/libsigrokdecode4DSL/decoders/mipi_rffe/pd.py b/libsigrokdecode4DSL/decoders/mipi_rffe/pd.py index 7e49ddd0..0df9a819 100644 --- a/libsigrokdecode4DSL/decoders/mipi_rffe/pd.py +++ b/libsigrokdecode4DSL/decoders/mipi_rffe/pd.py @@ -84,12 +84,12 @@ class Decoder(srd.Decoder): outputs = ['mipi_rffe'] tags = ['Embedded/industrial'] channels = ( - {'id': 'sclk', 'type': 8, 'name': 'SCLK', 'desc': 'Serial clock line'}, - {'id': 'sdata', 'type': 108, 'name': 'SDATA', 'desc': 'Serial data line'}, + {'id': 'sclk', 'type': 8, 'name': 'SCLK', 'desc': 'Serial clock line', 'idn':'dec_mipi_rffe_chan_sclk'}, + {'id': 'sdata', 'type': 108, 'name': 'SDATA', 'desc': 'Serial data line', 'idn':'dec_mipi_rffe_chan_sdata'}, ) options = ( - {'id': 'error_display', 'desc': 'Error display options', - 'default': 'display', 'values': ('display', 'not_display')}, + {'id': 'error_display', 'desc': 'Error display options', + 'default': 'display', 'values': ('display', 'not_display'), 'idn':'dec_mipi_rffe_opt_error_display'}, ) annotations = ( ('7', 'ssc', 'Sequence Start Condition'),