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Improve the hardware abstraction layer

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This commit is contained in:
DreamSourceLab
2018-07-08 17:48:18 +08:00
parent c7cba6a79b
commit 856e1803a7
105 changed files with 2745 additions and 2944 deletions
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48
libsigrok4DSL/dsdevice.c
View File

@@ -62,6 +62,7 @@ SR_PRIV struct sr_channel *sr_channel_new(uint16_t index, int type,
probe->enabled = enabled;
if (name)
probe->name = g_strdup(name);
probe->vga_ptr = NULL;
return probe;
}
@@ -181,49 +182,6 @@ SR_API int sr_dev_trigger_set(const struct sr_dev_inst *sdi, uint16_t probenum,
return ret;
}
/**
* Determine whether the specified device instance has the specified
* capability.
*
* @param sdi Pointer to the device instance to be checked. Must not be NULL.
* If the device's 'driver' field is NULL (virtual device), this
* function will always return FALSE (virtual devices don't have
* a hardware capabilities list).
* @param key The option that should be checked for support on the
* specified device.
*
* @return TRUE if the device has the specified option, FALSE otherwise.
* FALSE is also returned on invalid input parameters or other
* error conditions.
*
* @since 0.1.0 (but the API changed in 0.2.0)
*/
SR_API gboolean sr_dev_has_option(const struct sr_dev_inst *sdi, int key)
{
GVariant *gvar;
const int *devopts;
gsize num_opts, i;
int ret;
if (!sdi || !sdi->driver || !sdi->driver->config_list)
return FALSE;
if (sdi->driver->config_list(SR_CONF_DEVICE_OPTIONS, &gvar, sdi, NULL) != SR_OK)
return FALSE;
ret = FALSE;
devopts = g_variant_get_fixed_array(gvar, &num_opts, sizeof(int32_t));
for (i = 0; i < num_opts; i++) {
if (devopts[i] == key) {
ret = TRUE;
break;
}
}
g_variant_unref(gvar);
return ret;
}
/** @private */
SR_PRIV struct sr_dev_inst *sr_dev_inst_new(int mode, int index, int status,
const char *vendor, const char *model, const char *version)
@@ -260,6 +218,8 @@ SR_PRIV void sr_dev_probes_free(struct sr_dev_inst *sdi)
probe = l->data;
g_free(probe->name);
g_free(probe->trigger);
if (probe->vga_ptr)
g_free(probe->vga_ptr);
g_free(probe);
}
@@ -369,7 +329,7 @@ SR_API GSList *sr_dev_list(const struct sr_dev_driver *driver)
return NULL;
}
SR_API GSList *sr_dev_mode_list(const struct sr_dev_inst *sdi)
SR_API const GSList *sr_dev_mode_list(const struct sr_dev_inst *sdi)
{
if (sdi && sdi->driver && sdi->driver->dev_mode_list)
return sdi->driver->dev_mode_list(sdi);

36
libsigrok4DSL/hardware/DSL/command.h
View File

@@ -29,9 +29,15 @@
#define CMD_CTL_RD_PRE 0xb1
#define CMD_CTL_RD 0xb2
// read only
#define bmGPIF_DONE (1 << 7)
#define bmFPGA_DONE (1 << 6)
#define bmFPGA_INIT_B (1 << 5)
// write only
#define bmCH_CH0 (1 << 7)
#define bmCH_COM (1 << 6)
#define bmCH_CH1 (1 << 5)
// read/write
#define bmSYS_OVERFLOW (1 << 4)
#define bmSYS_CLR (1 << 3)
#define bmSYS_EN (1 << 2)
@@ -43,11 +49,31 @@
#define bmWR_WORDWIDE (1 << 0)
#define VTH_ADDR 0x78
#define EEWP_ADDR 0x70
#define CTR1_ADDR 0x71
#define CTR0_ADDR 0x70
#define COMB_ADDR 0x68
#define EXT_I2CSEL 0x71
#define FPGA_I2CADDR 0x21
#define EXT_I2CADDR 0x50
#define EI2C_ADDR 0x60
#define EI2C_CTR_OFF 0x2
#define EI2C_RXR_OFF 0x3
#define EI2C_SR_OFF 0x4
#define EI2C_TXR_OFF 0x3
#define EI2C_CR_OFF 0x4
#define EI2C_SEL_OFF 0x7
#define bmEI2C_EN (1 << 7)
#define bmEI2C_STA (1 << 7)
#define bmEI2C_STO (1 << 6)
#define bmEI2C_RD (1 << 5)
#define bmEI2C_WR (1 << 4)
#define bmEI2C_NACK (1 << 3)
#define bmEI2C_RXNACK (1 << 7)
#define bmEI2C_TIP (1 << 1)
#define EI2C_AWR 0xA0
#define EI2C_ARD 0xA1
enum {
DSL_CTL_FW_VERSION = 0,
@@ -67,7 +93,7 @@ enum {
DSL_CTL_I2C_DSO = 13,
DSL_CTL_I2C_REG = 14,
DSL_CTL_DSO_MEASURE = 15,
DSL_CTL_I2C_STATUS = 15,
DSL_CTL_DSO_EN0 = 16,
DSL_CTL_DSO_DC0 = 17,

801
libsigrok4DSL/hardware/DSL/dscope.c
View File

File diff suppressed because it is too large Load Diff

450
libsigrok4DSL/hardware/DSL/dsl.c
View File

@@ -33,6 +33,169 @@ static const unsigned int total_buffer_time = 100;
static const unsigned int instant_buffer_size = 1024 * 1024;
static uint16_t test_init = 1;
static const int32_t probeOptions[] = {
SR_CONF_PROBE_COUPLING,
SR_CONF_PROBE_VDIV,
SR_CONF_PROBE_MAP_UNIT,
SR_CONF_PROBE_MAP_MIN,
SR_CONF_PROBE_MAP_MAX,
};
static const int32_t probeSessions[] = {
SR_CONF_PROBE_COUPLING,
SR_CONF_PROBE_VDIV,
SR_CONF_PROBE_MAP_UNIT,
SR_CONF_PROBE_MAP_MIN,
SR_CONF_PROBE_MAP_MAX,
};
static const uint8_t probeCoupling[] = {
SR_DC_COUPLING,
SR_AC_COUPLING,
};
const char *probeMapUnits[] = {
"V",
"A",
"℃",
"℉",
"g",
"m",
"m/s",
};
static const char *probe_names[] = {
"0", "1", "2", "3", "4", "5", "6", "7",
"8", "9", "10", "11", "12", "13", "14", "15",
NULL,
};
static struct sr_dev_mode mode_list[] = {
{"LA", LOGIC},
{"DAQ", ANALOG},
{"OSC", DSO},
};
SR_PRIV void dsl_probe_init(struct sr_dev_inst *sdi)
{
int i;
GSList *l;
struct DSL_context *devc = sdi->priv;
for (l = sdi->channels; l; l = l->next) {
struct sr_channel *probe = (struct sr_channel *)l->data;
probe->vdiv = 1000;
probe->vfactor = 1;
probe->vpos = 0;
probe->coupling = SR_DC_COUPLING;
probe->trig_value = 0x80;
probe->vpos_trans = devc->profile->dev_caps.default_pwmtrans;
probe->ms_show = TRUE;
for (i = DSO_MS_BEGIN; i < DSO_MS_END; i++)
probe->ms_en[i] = default_ms_en[i];
probe->map_unit = probeMapUnits[0];
probe->map_min = -1;
probe->map_max = 1;
if (devc->profile->dev_caps.vdivs &&
probe->vga_ptr == NULL) {
for (i = 0; devc->profile->dev_caps.vdivs[i]; i++);
probe->vga_ptr = g_try_malloc((i+1)*sizeof(struct DSL_vga));
(probe->vga_ptr + i)->id = 0;
(probe->vga_ptr + i)->key = 0;
(probe->vga_ptr + i)->vgain = 0;
(probe->vga_ptr + i)->voff = 0;
(probe->vga_ptr + i)->voff_comp = 0;
for (i = 0; devc->profile->dev_caps.vdivs[i]; i++) {
(probe->vga_ptr + i)->id = devc->profile->dev_caps.vga_id;
(probe->vga_ptr + i)->key = devc->profile->dev_caps.vdivs[i];
}
}
}
}
SR_PRIV int dsl_setup_probes(struct sr_dev_inst *sdi, int num_probes)
{
uint16_t j;
struct sr_channel *probe;
struct DSL_context *devc = sdi->priv;
for (j = 0; j < num_probes; j++) {
if (!(probe = sr_channel_new(j, channel_modes[devc->ch_mode].type,
TRUE, probe_names[j])))
return SR_ERR;
sdi->channels = g_slist_append(sdi->channels, probe);
}
dsl_probe_init(sdi);
return SR_OK;
}
SR_PRIV int dsl_adjust_probes(struct sr_dev_inst *sdi, int num_probes)
{
uint16_t j;
struct sr_channel *probe;
struct DSL_context *devc = sdi->priv;
GSList *l;
assert(num_probes > 0);
j = g_slist_length(sdi->channels);
while(j < num_probes) {
if (!(probe = sr_channel_new(j, channel_modes[devc->ch_mode].type,
TRUE, probe_names[j])))
return SR_ERR;
sdi->channels = g_slist_append(sdi->channels, probe);
j++;
}
while(j > num_probes) {
sdi->channels = g_slist_delete_link(sdi->channels, g_slist_last(sdi->channels));
j--;
}
for(l = sdi->channels; l; l = l->next) {
probe = (struct sr_channel *)l->data;
probe->enabled = TRUE;
probe->type = channel_modes[devc->ch_mode].type;
}
return SR_OK;
}
SR_PRIV const GSList *dsl_mode_list(const struct sr_dev_inst *sdi)
{
struct DSL_context *devc;
GSList *l = NULL;
unsigned int i;
devc = sdi->priv;
for (i = 0; i < ARRAY_SIZE(mode_list); i++) {
if (devc->profile->dev_caps.mode_caps & (1 << i))
l = g_slist_append(l, &mode_list[i]);
}
return l;
}
SR_PRIV void dsl_adjust_samplerate(struct DSL_context *devc)
{
devc->samplerates_max_index = ARRAY_SIZE(samplerates) - 1;
while (samplerates[devc->samplerates_max_index] >
channel_modes[devc->ch_mode].max_samplerate)
devc->samplerates_max_index--;
devc->samplerates_min_index = 0;
while (samplerates[devc->samplerates_min_index] <
channel_modes[devc->ch_mode].min_samplerate)
devc->samplerates_min_index++;
assert(devc->samplerates_max_index >= devc->samplerates_min_index);
if (devc->cur_samplerate > samplerates[devc->samplerates_max_index])
devc->cur_samplerate = samplerates[devc->samplerates_max_index];
if (devc->cur_samplerate < samplerates[devc->samplerates_min_index])
devc->cur_samplerate = samplerates[devc->samplerates_min_index];
}
SR_PRIV int dsl_en_ch_num(const struct sr_dev_inst *sdi)
{
GSList *l;
@@ -100,7 +263,6 @@ static int hw_dev_open(struct sr_dev_driver *di, struct sr_dev_inst *sdi)
struct drv_context *drvc;
struct version_info vi;
int ret, skip, i, device_count;
uint8_t revid;
struct ctl_rd_cmd rd_cmd;
uint8_t rd_cmd_data[2];
@@ -172,20 +334,11 @@ static int hw_dev_open(struct sr_dev_driver *di, struct sr_dev_inst *sdi)
vi.major = rd_cmd_data[0];
vi.minor = rd_cmd_data[1];
rd_cmd.header.dest = DSL_CTL_REVID_VERSION;
rd_cmd.header.size = 1;
rd_cmd.data = &revid;
if ((ret = command_ctl_rd(usb->devhdl, rd_cmd)) != SR_OK) {
sr_err("Failed to get REVID.");
break;
}
/*
* Different versions may have incompatible issue,
* Mark for up level process
*/
if (vi.major != DSL_REQUIRED_VERSION_MAJOR ||
vi.minor != DSL_REQUIRED_VERSION_MINOR) {
if (vi.major != DSL_REQUIRED_VERSION_MAJOR) {
sr_err("Expected firmware version %d.%d, "
"got %d.%d.", DSL_REQUIRED_VERSION_MAJOR, DSL_REQUIRED_VERSION_MINOR,
vi.major, vi.minor);
@@ -199,9 +352,6 @@ static int hw_dev_open(struct sr_dev_driver *di, struct sr_dev_inst *sdi)
sdi->index, usb->bus, usb->address,
USB_INTERFACE, vi.major, vi.minor);
sr_info("Detected REVID=%d, it's a Cypress CY7C68013%s.",
revid, (revid != 1) ? " (FX2)" : "A (FX2LP)");
break;
}
libusb_free_device_list(devlist, 1);
@@ -253,11 +403,9 @@ SR_PRIV int dsl_configure_probes(const struct sr_dev_inst *sdi)
SR_PRIV uint64_t dsl_channel_depth(const struct sr_dev_inst *sdi)
{
struct DSL_context *devc = sdi->priv;
int ch_num = dsl_en_ch_num(sdi);
if (strcmp(sdi->model, "DSLogic Basic") == 0)
return DSLOGIC_BASIC_MEM_DEPTH / (ch_num ? ch_num : 1);
else
return DSLOGIC_MEM_DEPTH / (ch_num ? ch_num : 1);
return devc->profile->dev_caps.hw_depth / (ch_num ? ch_num : 1);
}
SR_PRIV int dsl_wr_reg(const struct sr_dev_inst *sdi, uint8_t addr, uint8_t value)
@@ -271,7 +419,7 @@ SR_PRIV int dsl_wr_reg(const struct sr_dev_inst *sdi, uint8_t addr, uint8_t valu
hdl = usb->devhdl;
wr_cmd.header.dest = DSL_CTL_I2C_REG;
wr_cmd.header.offset = (FPGA_I2CADDR << 8) + addr;
wr_cmd.header.offset = addr;
wr_cmd.header.size = 1;
wr_cmd.data[0] = value;
if ((ret = command_ctl_wr(hdl, wr_cmd)) != SR_OK) {
@@ -282,28 +430,110 @@ SR_PRIV int dsl_wr_reg(const struct sr_dev_inst *sdi, uint8_t addr, uint8_t valu
return SR_OK;
}
SR_PRIV int dsl_wr_ext(const struct sr_dev_inst *sdi, uint8_t addr, uint8_t value)
SR_PRIV int dsl_rd_reg(const struct sr_dev_inst *sdi, uint8_t addr, uint8_t *value)
{
struct sr_usb_dev_inst *usb;
struct libusb_device_handle *hdl;
struct ctl_wr_cmd wr_cmd;
struct ctl_rd_cmd rd_cmd;
int ret;
usb = sdi->conn;
hdl = usb->devhdl;
wr_cmd.header.dest = DSL_CTL_I2C_REG;
wr_cmd.header.offset = (EXT_I2CADDR << 8) + addr;
wr_cmd.header.size = 1;
wr_cmd.data[0] = value;
if ((ret = command_ctl_wr(hdl, wr_cmd)) != SR_OK) {
sr_err("Sent DSL_CTL_I2C_REG command failed.");
rd_cmd.header.dest = DSL_CTL_I2C_STATUS;
rd_cmd.header.offset = addr;
rd_cmd.header.size = 1;
rd_cmd.data = value;
if ((ret = command_ctl_rd(usb->devhdl, rd_cmd)) != SR_OK) {
sr_err("Sent DSL_CTL_I2C_STATUS read command failed.");
return SR_ERR;
}
return SR_OK;
}
SR_PRIV int dsl_wr_ext(const struct sr_dev_inst *sdi, uint8_t addr, uint8_t value)
{
uint8_t rdata;
int ret;
// write addr + wr
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_TXR_OFF, EI2C_AWR);
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_CR_OFF, bmEI2C_STA | bmEI2C_WR);
// check done
ret = dsl_rd_reg(sdi, EI2C_ADDR+EI2C_SR_OFF, &rdata);
if (rdata & bmEI2C_RXNACK) {
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_CR_OFF, bmEI2C_STO | bmEI2C_WR);
return SR_ERR;
}
// write offset + wr
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_TXR_OFF, addr);
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_CR_OFF, bmEI2C_WR);
// check done
ret = dsl_rd_reg(sdi, EI2C_ADDR+EI2C_SR_OFF, &rdata);
if (rdata & bmEI2C_RXNACK) {
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_CR_OFF, bmEI2C_STO | bmEI2C_WR);
return SR_ERR;
}
// write value + wr
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_TXR_OFF, value);
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_CR_OFF, bmEI2C_STO | bmEI2C_WR);
// check done
ret = dsl_rd_reg(sdi, EI2C_ADDR+EI2C_SR_OFF, &rdata);
if (rdata & bmEI2C_RXNACK) {
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_CR_OFF, bmEI2C_STO | bmEI2C_WR);
return SR_ERR;
}
return ret;
}
SR_PRIV int dsl_rd_ext(const struct sr_dev_inst *sdi, unsigned char *ctx, uint16_t addr, uint8_t len)
{
uint8_t rdata;
int ret;
// write addr + wr
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_TXR_OFF, EI2C_AWR);
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_CR_OFF, bmEI2C_STA | bmEI2C_WR);
// check done
ret = dsl_rd_reg(sdi, EI2C_ADDR+EI2C_SR_OFF, &rdata);
if (rdata & bmEI2C_RXNACK) {
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_CR_OFF, bmEI2C_STO | bmEI2C_WR);
return SR_ERR;
}
// write offset + wr
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_TXR_OFF, addr);
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_CR_OFF, bmEI2C_WR);
// check done
ret = dsl_rd_reg(sdi, EI2C_ADDR+EI2C_SR_OFF, &rdata);
if (rdata & bmEI2C_RXNACK) {
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_CR_OFF, bmEI2C_STO | bmEI2C_WR);
return SR_ERR;
}
// write read addr + wr
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_TXR_OFF, EI2C_ARD);
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_CR_OFF, bmEI2C_STA | bmEI2C_WR);
// check done
ret = dsl_rd_reg(sdi, EI2C_ADDR+EI2C_SR_OFF, &rdata);
if (rdata & bmEI2C_RXNACK) {
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_CR_OFF, bmEI2C_STO | bmEI2C_WR);
return SR_ERR;
}
while(--len) {
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_CR_OFF, bmEI2C_RD);
ret = dsl_rd_reg(sdi, EI2C_ADDR+EI2C_RXR_OFF, ctx);
ctx++;
}
ret = dsl_wr_reg(sdi, EI2C_ADDR+EI2C_CR_OFF, bmEI2C_STO | bmEI2C_RD | bmEI2C_NACK);
ret = dsl_rd_reg(sdi, EI2C_ADDR+EI2C_RXR_OFF, ctx);
return ret;
}
SR_PRIV int dsl_wr_dso(const struct sr_dev_inst *sdi, uint64_t cmd)
{
struct sr_usb_dev_inst *usb;
@@ -432,8 +662,8 @@ SR_PRIV int dsl_fpga_arm(const struct sr_dev_inst *sdi)
(devc->clock_edge << CLK_EDGE_BIT) +
(devc->rle_mode << RLE_MODE_BIT) +
((sdi->mode == DSO) << DSO_MODE_BIT) +
(((devc->cur_samplerate == (2 * DSLOGIC_MAX_LOGIC_SAMPLERATE)) && sdi->mode != DSO) << HALF_MODE_BIT) +
((devc->cur_samplerate == (4 * DSLOGIC_MAX_LOGIC_SAMPLERATE)) << QUAR_MODE_BIT) +
(((devc->cur_samplerate == (2 * channel_modes[devc->ch_mode].hw_max_samplerate)) && sdi->mode != DSO) << HALF_MODE_BIT) +
((devc->cur_samplerate == (4 * channel_modes[devc->ch_mode].hw_max_samplerate)) << QUAR_MODE_BIT) +
((sdi->mode == ANALOG) << ANALOG_MODE_BIT) +
((devc->filter == SR_FILTER_1T) << FILTER_BIT) +
(devc->instant << INSTANT_BIT) +
@@ -444,18 +674,16 @@ SR_PRIV int dsl_fpga_arm(const struct sr_dev_inst *sdi)
((devc->test_mode == SR_TEST_INTERNAL) << INT_TEST_BIT);
// sample rate divider
tmp_u32 = (sdi->mode == DSO) ? (uint32_t)ceil(DSLOGIC_MAX_DSO_SAMPLERATE * 1.0 / devc->cur_samplerate / ch_num) :
(sdi->mode == ANALOG) ? (uint32_t)ceil(DSCOPE_MAX_DAQ_SAMPLERATE * 1.0 / max(devc->cur_samplerate, HW_MIN_SAMPLERATE)) :
(uint32_t)ceil(DSLOGIC_MAX_LOGIC_SAMPLERATE * 1.0 / devc->cur_samplerate);
devc->unit_pitch = ceil(HW_MIN_SAMPLERATE * 1.0 / devc->cur_samplerate);
tmp_u32 = (sdi->mode == DSO) ? (uint32_t)ceil(channel_modes[devc->ch_mode].max_samplerate * 1.0 / devc->cur_samplerate / ch_num) :
(sdi->mode == ANALOG) ? (uint32_t)ceil(channel_modes[devc->ch_mode].hw_max_samplerate * 1.0 / max(devc->cur_samplerate, channel_modes[devc->ch_mode].hw_min_samplerate)) :
(uint32_t)ceil(channel_modes[devc->ch_mode].hw_max_samplerate * 1.0 / devc->cur_samplerate);
devc->unit_pitch = ceil(channel_modes[devc->ch_mode].hw_min_samplerate * 1.0 / devc->cur_samplerate);
setting.div_l = tmp_u32 & 0x0000ffff;
setting.div_h = tmp_u32 >> 16;
// capture counter
// analog: 16bits, but sample with half mode(0-7 valid only)
tmp_u64 = (sdi->mode == DSO) ? (devc->limit_samples / (g_slist_length(sdi->channels) / ch_num)) :
(sdi->mode == ANALOG) ? (devc->limit_samples * g_slist_length(sdi->channels) * 4) :
(devc->limit_samples);
tmp_u64 = (sdi->mode == DSO) ? (devc->actual_samples / (channel_modes[devc->ch_mode].num / ch_num)) :
(devc->limit_samples);
tmp_u64 >>= 4; // hardware minimum unit 64
setting.cnt_l = tmp_u64 & 0x0000ffff;
setting.cnt_h = tmp_u64 >> 16;
@@ -831,7 +1059,7 @@ SR_PRIV int dsl_config_get(int id, GVariant **data, const struct sr_dev_inst *sd
const struct sr_channel *ch,
const struct sr_channel_group *cg)
{
struct DSL_context *devc;
struct DSL_context *devc = sdi->priv;
struct sr_usb_dev_inst *usb;
char str[128];
@@ -852,37 +1080,31 @@ SR_PRIV int dsl_config_get(int id, GVariant **data, const struct sr_dev_inst *sd
case SR_CONF_LIMIT_SAMPLES:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_uint64(devc->limit_samples);
break;
case SR_CONF_SAMPLERATE:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_uint64(devc->cur_samplerate);
break;
case SR_CONF_RLE_SUPPORT:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_boolean(devc->rle_support);
break;
case SR_CONF_CLOCK_TYPE:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_boolean(devc->clock_type);
break;
case SR_CONF_CLOCK_EDGE:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_boolean(devc->clock_edge);
break;
case SR_CONF_INSTANT:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_boolean(devc->instant);
break;
case SR_CONF_PROBE_VDIV:
@@ -903,9 +1125,18 @@ SR_PRIV int dsl_config_get(int id, GVariant **data, const struct sr_dev_inst *sd
case SR_CONF_TIMEBASE:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_uint64(devc->timebase);
break;
case SR_CONF_MAX_TIMEBASE:
if (!sdi)
return SR_ERR;
*data = g_variant_new_uint64(min(MAX_TIMEBASE,
SR_SEC(1) *
devc->profile->dev_caps.dso_depth /
channel_modes[devc->ch_mode].num /
channel_modes[devc->ch_mode].min_samplerate /
DS_CONF_DSO_HDIVS));
break;
case SR_CONF_PROBE_COUPLING:
if (!ch)
return SR_ERR;
@@ -916,28 +1147,19 @@ SR_PRIV int dsl_config_get(int id, GVariant **data, const struct sr_dev_inst *sd
return SR_ERR;
*data = g_variant_new_boolean(ch->enabled);
break;
case SR_CONF_DATALOCK:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_boolean(devc->data_lock);
break;
case SR_CONF_TRIGGER_SLOPE:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_byte(devc->trigger_slope);
break;
case SR_CONF_TRIGGER_SOURCE:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_byte(devc->trigger_source&0x0f);
break;
case SR_CONF_TRIGGER_CHANNEL:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_byte(devc->trigger_source>>4);
break;
case SR_CONF_TRIGGER_VALUE:
@@ -948,7 +1170,6 @@ SR_PRIV int dsl_config_get(int id, GVariant **data, const struct sr_dev_inst *sd
case SR_CONF_HORIZ_TRIGGERPOS:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
if (sdi->mode == DSO) {
*data = g_variant_new_byte(devc->trigger_hrate);
} else {
@@ -958,19 +1179,21 @@ SR_PRIV int dsl_config_get(int id, GVariant **data, const struct sr_dev_inst *sd
case SR_CONF_TRIGGER_HOLDOFF:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_uint64(devc->trigger_holdoff);
break;
case SR_CONF_TRIGGER_MARGIN:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_byte(devc->trigger_margin);
break;
case SR_CONF_HAVE_ZERO:
if (!sdi)
return SR_ERR;
*data = g_variant_new_boolean(devc->profile->dev_caps.feature_caps & CAPS_FEATURE_ZERO);
break;
case SR_CONF_ZERO:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
if (sdi->mode == DSO)
*data = g_variant_new_boolean(devc->zero);
else
@@ -979,14 +1202,83 @@ SR_PRIV int dsl_config_get(int id, GVariant **data, const struct sr_dev_inst *sd
case SR_CONF_ROLL:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_boolean(devc->roll);
break;
case SR_CONF_UNIT_BITS:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_byte(devc->unit_bits);
*data = g_variant_new_byte(channel_modes[devc->ch_mode].unit_bits);
break;
case SR_CONF_PROBE_MAP_UNIT:
if (!sdi || !ch)
return SR_ERR;
*data = g_variant_new_string(ch->map_unit);
break;
case SR_CONF_PROBE_MAP_MIN:
if (!sdi || !ch)
return SR_ERR;
*data = g_variant_new_double(ch->map_min);
break;
case SR_CONF_PROBE_MAP_MAX:
if (!sdi || !ch)
return SR_ERR;
*data = g_variant_new_double(ch->map_max);
break;
default:
return SR_ERR_NA;
}
return SR_OK;
}
SR_PRIV int dsl_config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
const struct sr_channel_group *cg)
{
struct DSL_context *devc;
GVariant *gvar;
GVariantBuilder gvb;
int i;
(void)cg;
devc = sdi->priv;
switch (key) {
case SR_CONF_SAMPLERATE:
g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
// gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
// ARRAY_SIZE(samplerates), sizeof(uint64_t));
gvar = g_variant_new_from_data(G_VARIANT_TYPE("at"),
samplerates + devc->samplerates_min_index,
(devc->samplerates_max_index - devc->samplerates_min_index + 1) * sizeof(uint64_t), TRUE, NULL, NULL);
g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
*data = g_variant_builder_end(&gvb);
break;
case SR_CONF_PROBE_CONFIGS:
*data = g_variant_new_from_data(G_VARIANT_TYPE("ai"),
probeOptions, ARRAY_SIZE(probeOptions)*sizeof(int32_t), TRUE, NULL, NULL);
break;
case SR_CONF_PROBE_SESSIONS:
*data = g_variant_new_from_data(G_VARIANT_TYPE("ai"),
probeSessions, ARRAY_SIZE(probeSessions)*sizeof(int32_t), TRUE, NULL, NULL);
break;
case SR_CONF_PROBE_VDIV:
g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
for (i = 0; devc->profile->dev_caps.vdivs[i]; i++);
gvar = g_variant_new_from_data(G_VARIANT_TYPE("at"),
devc->profile->dev_caps.vdivs, i*sizeof(uint64_t), TRUE, NULL, NULL);
g_variant_builder_add(&gvb, "{sv}", "vdivs", gvar);
*data = g_variant_builder_end(&gvb);
break;
case SR_CONF_PROBE_COUPLING:
g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
gvar = g_variant_new_from_data(G_VARIANT_TYPE("ay"),
probeCoupling, ARRAY_SIZE(probeCoupling)*sizeof(uint8_t), TRUE, NULL, NULL);
g_variant_builder_add(&gvb, "{sv}", "coupling", gvar);
*data = g_variant_builder_end(&gvb);
break;
case SR_CONF_PROBE_MAP_UNIT:
*data = g_variant_new_strv(probeMapUnits, ARRAY_SIZE(probeMapUnits));
break;
default:
return SR_ERR_NA;
@@ -1113,7 +1405,7 @@ SR_PRIV int dsl_dev_acquisition_stop(const struct sr_dev_inst *sdi, void *cb_dat
if (!devc->abort) {
devc->abort = TRUE;
dsl_wr_reg(sdi, EEWP_ADDR, bmFORCE_RDY);
dsl_wr_reg(sdi, CTR0_ADDR, bmFORCE_RDY);
} else if (devc->status == DSL_FINISH) {
/* Stop GPIF acquisition */
wr_cmd.header.dest = DSL_CTL_STOP;
@@ -1139,8 +1431,8 @@ SR_PRIV int dsl_dev_status_get(const struct sr_dev_inst *sdi, struct sr_status *
devc = sdi->priv;
usb = sdi->conn;
if (prg && (devc->status == DSL_START)) {
rd_cmd.header.dest = DSL_CTL_DSO_MEASURE;
rd_cmd.header.offset = (FPGA_I2CADDR << 8) + begin;
rd_cmd.header.dest = DSL_CTL_I2C_STATUS;
rd_cmd.header.offset = begin;
rd_cmd.header.size = end - begin + 1;
rd_cmd.data = (unsigned char*)status;
ret = command_ctl_rd(usb->devhdl, rd_cmd);
@@ -1212,7 +1504,7 @@ static void finish_acquisition(struct DSL_context *devc)
{
struct sr_datafeed_packet packet;
sr_err("%s: send SR_DF_END packet", __func__);
sr_info("%s: send SR_DF_END packet", __func__);
/* Terminate session. */
packet.type = SR_DF_END;
packet.status = SR_PKT_OK;
@@ -1273,15 +1565,9 @@ static void receive_transfer(struct libusb_transfer *transfer)
uint8_t *cur_buf = transfer->buffer;
struct DSL_context *devc = transfer->user_data;
struct sr_dev_inst *sdi = devc->cb_data;
const int sample_width = (devc->sample_wide) ? 2 : 1;
if (devc->status == DSL_START)
devc->status = DSL_DATA;
if (devc->data_lock) {
resubmit_transfer(transfer);
devc->trf_completed = 1;
return;
}
if (devc->abort)
devc->status = DSL_STOP;
@@ -1313,7 +1599,7 @@ static void receive_transfer(struct libusb_transfer *transfer)
logic.data = cur_buf;
} else if (sdi->mode == DSO) {
if (!devc->instant) {
const uint32_t mstatus_offset = devc->limit_samples / (g_slist_length(sdi->channels)/dsl_en_ch_num(sdi));
const uint32_t mstatus_offset = devc->actual_samples / (channel_modes[devc->ch_mode].num/dsl_en_ch_num(sdi));
devc->mstatus.pkt_id = *((const uint16_t*)cur_buf + mstatus_offset);
devc->mstatus.ch0_max = *((const uint8_t*)cur_buf + mstatus_offset*2 + 1*2);
devc->mstatus.ch0_min = *((const uint8_t*)cur_buf + mstatus_offset*2 + 3);
@@ -1334,19 +1620,18 @@ static void receive_transfer(struct libusb_transfer *transfer)
devc->mstatus.vlen = instant_buffer_size;
}
const uint32_t divider = devc->zero ? 0x1 : (uint32_t)ceil(DSCOPE_MAX_SAMPLERATE * 1.0 / devc->cur_samplerate / dsl_en_ch_num(sdi));
const uint32_t divider = devc->zero ? 0x1 : (uint32_t)ceil(channel_modes[devc->ch_mode].max_samplerate * 1.0 / devc->cur_samplerate / dsl_en_ch_num(sdi));
if ((devc->mstatus.pkt_id == DSO_PKTID &&
devc->mstatus.sample_divider == divider &&
devc->mstatus.vlen != 0 &&
devc->mstatus.vlen <= (transfer->actual_length - 512) / sample_width) ||
devc->mstatus.vlen <= (uint32_t)(transfer->actual_length - 512) / 2) ||
devc->instant) {
devc->roll = (devc->mstatus.stream_mode != 0);
devc->mstatus_valid = devc->instant ? FALSE : TRUE;
packet.type = SR_DF_DSO;
packet.payload = &dso;
dso.probes = sdi->channels;
//dso.num_samples = (transfer->actual_length - 512) / sample_width;
cur_sample_count = 2 * devc->mstatus.vlen / dsl_en_ch_num(sdi) ;
cur_sample_count = min(2 * devc->mstatus.vlen / dsl_en_ch_num(sdi), devc->limit_samples);
dso.num_samples = cur_sample_count;
dso.mq = SR_MQ_VOLTAGE;
dso.unit = SR_UNIT_VOLT;
@@ -1363,9 +1648,9 @@ static void receive_transfer(struct libusb_transfer *transfer)
packet.type = SR_DF_ANALOG;
packet.payload = &analog;
analog.probes = sdi->channels;
cur_sample_count = transfer->actual_length / (((devc->unit_bits + 7) / 8) * g_slist_length(analog.probes));
cur_sample_count = transfer->actual_length / (((channel_modes[devc->ch_mode].unit_bits + 7) / 8) * g_slist_length(analog.probes));
analog.num_samples = cur_sample_count;
analog.unit_bits = devc->unit_bits;
analog.unit_bits = channel_modes[devc->ch_mode].unit_bits;;
analog.unit_pitch = devc->unit_pitch;
analog.mq = SR_MQ_VOLTAGE;
analog.unit = SR_UNIT_VOLT;
@@ -1475,9 +1760,10 @@ SR_PRIV int dsl_start_transfers(const struct sr_dev_inst *sdi)
test_init = 1;
if (devc->instant)
dso_buffer_size = instant_buffer_size * g_slist_length(sdi->channels);
dso_buffer_size = min(instant_buffer_size * channel_modes[devc->ch_mode].num,
devc->profile->dev_caps.hw_depth / channel_modes[devc->ch_mode].unit_bits);
else
dso_buffer_size = devc->limit_samples * dsl_en_ch_num(sdi) + 512;
dso_buffer_size = devc->actual_samples * dsl_en_ch_num(sdi) + 512;
num_transfers = (devc->stream) ? get_number_of_transfers(devc) : 1;
size = (sdi->mode == DSO) ? dso_buffer_size :

506
libsigrok4DSL/hardware/DSL/dsl.h
View File

@@ -42,63 +42,45 @@
/* Message logging helpers with subsystem-specific prefix string. */
#define LOG_PREFIX "DSL Hardware: "
#define ds_log(l, s, args...) ds_log(l, LOG_PREFIX s, ## args)
#define ds_spew(s, args...) ds_spew(LOG_PREFIX s, ## args)
#define ds_dbg(s, args...) ds_dbg(LOG_PREFIX s, ## args)
#define ds_info(s, args...) ds_info(LOG_PREFIX s, ## args)
#define ds_warn(s, args...) ds_warn(LOG_PREFIX s, ## args)
#define ds_err(s, args...) ds_err(LOG_PREFIX s, ## args)
#define sr_log(l, s, args...) sr_log(l, LOG_PREFIX s, ## args)
#define sr_spew(s, args...) sr_spew(LOG_PREFIX s, ## args)
#define sr_dbg(s, args...) sr_dbg(LOG_PREFIX s, ## args)
#define sr_info(s, args...) sr_info(LOG_PREFIX s, ## args)
#define sr_warn(s, args...) sr_warn(LOG_PREFIX s, ## args)
#define sr_err(s, args...) sr_err(LOG_PREFIX s, ## args)
#define USB_INTERFACE 0
#define USB_CONFIGURATION 1
#define NUM_TRIGGER_STAGES 16
#define TRIGGER_TYPE "01"
#define MAX_RENUM_DELAY_MS 3000
#define NUM_SIMUL_TRANSFERS 64
#define MAX_EMPTY_TRANSFERS (NUM_SIMUL_TRANSFERS * 2)
#define DSL_REQUIRED_VERSION_MAJOR 2
#define DSL_REQUIRED_VERSION_MINOR 0
#define MAX_8BIT_SAMPLE_RATE DS_MHZ(24)
#define MAX_16BIT_SAMPLE_RATE DS_MHZ(12)
/* hardware Capabilities */
#define CAPS_MODE_LOGIC (1 << 0)
#define CAPS_MODE_ANALOG (1 << 1)
#define CAPS_MODE_DSO (1 << 2)
/* 6 delay states of up to 256 clock ticks */
#define MAX_SAMPLE_DELAY (6 * 256)
#define CAPS_FEATURE_NONE 0
// voltage threshold
#define CAPS_FEATURE_VTH (1 << 0)
// with external buffer
#define CAPS_FEATURE_BUF (1 << 1)
// pre offset control
#define CAPS_FEATURE_PREOFF (1 << 2)
// small startup eemprom
#define CAPS_FEATURE_SEEP (1 << 3)
// zero calibration ability
#define CAPS_FEATURE_ZERO (1 << 4)
/* end */
#define DEV_CAPS_16BIT_POS 0
#define DEV_CAPS_16BIT (1 << DEV_CAPS_16BIT_POS)
#define MAX_ANALOG_PROBES_NUM 9
#define MAX_DSO_PROBES_NUM 2
#define DEFAULT_SAMPLERATE SR_MHZ(1)
#define DEFAULT_SAMPLELIMIT SR_MB(1)
#define VPOS_MINISTEP 0.083
#define VPOS_STEP 26.0
#define DSLOGIC_ATOMIC_BITS 6
#define DSLOGIC_ATOMIC_SAMPLES (1 << DSLOGIC_ATOMIC_BITS)
#define DSLOGIC_ATOMIC_SIZE (1 << (DSLOGIC_ATOMIC_BITS - 3))
#define DSLOGIC_ATOMIC_MASK (0xFFFF << DSLOGIC_ATOMIC_BITS)
#define DSLOGIC_MAX_DSO_DEPTH SR_MB(2)
//#define DSLOGIC_MAX_DSO_DEPTH SR_KB(2)
#define DSLOGIC_MAX_DSO_SAMPLERATE SR_MHZ(200)
#define DSLOGIC_INSTANT_DEPTH SR_MB(32)
#define DSLOGIC_MAX_LOGIC_DEPTH SR_MB(16)
#define DSLOGIC_MAX_LOGIC_SAMPLERATE SR_MHZ(100)
#define DSCOPE_MAX_DEPTH SR_MB(2)
//#define DSCOPE_MAX_DEPTH SR_KB(512)
#define DSCOPE_MAX_SAMPLERATE SR_MHZ(200)
#define DSCOPE_INSTANT_DEPTH SR_MB(32)
#define DSCOPE_VLD_CH_NUM 2
#define DSCOPE_MAX_DAQ_SAMPLERATE SR_MHZ(100)
#define HW_MIN_SAMPLERATE SR_KHZ(10)
/*
* for basic configuration
*/
@@ -118,28 +100,18 @@
#define EXT_TEST_BIT 14
#define INT_TEST_BIT 15
#define bmZERO 0x00
#define bmEEWP 0x01
#define bmFORCE_RDY 0x02
#define bmFORCE_STOP 0x04
#define bmSCOPE_SET 0x08
#define bmSCOPE_CLR 0x08
#define DSO_EN1_BIT 6
#define DSO_EN0_BIT 5
#define DSO_EN_COMB_BIT 4
#define DSO_DC1_BIT 3
#define DSO_ATT1_BIT 2
#define DSO_DC0_BIT 1
#define DSO_ATT0_BIT 0
#define bmNONE 0
#define bmEEWP (1 << 0)
#define bmFORCE_RDY (1 << 1)
#define bmFORCE_STOP (1 << 2)
#define bmSCOPE_SET (1 << 3)
#define bmSCOPE_CLR (1 << 4)
/*
* for DSLogic device
*
* packet content check
*/
#define MAX_LOGIC_PROBES 16
#define DSLOGIC_BASIC_MEM_DEPTH SR_KB(256)
#define DSLOGIC_MEM_DEPTH SR_MB(256)
#define TRIG_CHECKID 0x55555555
#define DSO_PKTID 0xa500
/*
* for DSCope device
@@ -151,52 +123,32 @@
* y = voff(fine) default bias
* the final offset: x+DSCOPE_CONSTANT_BIAS->vpos(coarse); y->voff(fine)
*/
#define DSCOPE_DEFAULT_TRANS (129<<8)+167
#define DSCOPE_DEFAULT_VOFF (32<<10)+558
#define DSCOPE_CONSTANT_BIAS 160
#define DSCOPE_TRANS_CMULTI 10
#define DSCOPE_TRANS_FMULTI 100.0
#define DSCOPE_DEFAULT_VGAIN0 0x162400
#define DSCOPE_DEFAULT_VGAIN1 0x14C000
#define DSCOPE_DEFAULT_VGAIN2 0x12E800
#define DSCOPE_DEFAULT_VGAIN3 0x118000
#define DSCOPE_DEFAULT_VGAIN4 0x102400
#define DSCOPE_DEFAULT_VGAIN5 0x2E800
#define DSCOPE_DEFAULT_VGAIN6 0x18000
#define DSCOPE_DEFAULT_VGAIN7 0x02400
/*
* for DSCope20 device
* trans: the whole windows offset map to the offset pwm(1024 total)
* voff: offset pwm constant bias to balance circuit offset
*/
#define DSCOPE20_DEFAULT_TRANS 920
#define DSCOPE20_DEFAULT_VOFF 45
#define DSCOPE20_DEFAULT_VGAIN0 0x1DA800
#define DSCOPE20_DEFAULT_VGAIN1 0x1A7200
#define DSCOPE20_DEFAULT_VGAIN2 0x164200
#define DSCOPE20_DEFAULT_VGAIN3 0x131800
#define DSCOPE20_DEFAULT_VGAIN4 0xBD000
#define DSCOPE20_DEFAULT_VGAIN5 0x7AD00
#define DSCOPE20_DEFAULT_VGAIN6 0x48800
#define DSCOPE20_DEFAULT_VGAIN7 0x12000
#define DSCOPEC20_DEFAULT_VGAIN0 0x1C5C00
#define DSCOPEC20_DEFAULT_VGAIN1 0x19EB00
#define DSCOPEC20_DEFAULT_VGAIN2 0x16AE00
#define DSCOPEC20_DEFAULT_VGAIN3 0x143D00
#define DSCOPEC20_DEFAULT_VGAIN4 0xAFC00
#define DSCOPEC20_DEFAULT_VGAIN5 0x7C000
#define DSCOPEC20_DEFAULT_VGAIN6 0x54E00
#define DSCOPEC20_DEFAULT_VGAIN7 0x2DD00
#define CALI_VGAIN_RANGE 100
#define CALI_VOFF_RANGE (1024-DSCOPE20_DEFAULT_TRANS)
#define DSO_AUTOTRIG_THRESHOLD 16
#define TRIG_CHECKID 0x55555555
#define DSO_PKTID 0xa500
struct DSL_caps {
uint64_t mode_caps;
uint64_t feature_caps;
uint64_t channels;
uint64_t hw_depth;
uint64_t dso_depth;
uint8_t intest_channel;
const uint64_t *vdivs;
uint8_t vga_id;
uint16_t default_channelmode;
uint64_t default_samplerate;
uint64_t default_samplelimit;
uint16_t default_pwmtrans;
uint16_t default_pwmmargin;
};
struct DSL_profile {
uint16_t vid;
@@ -211,82 +163,328 @@ struct DSL_profile {
const char *fpga_bit33;
const char *fpga_bit50;
uint32_t dev_caps;
struct DSL_caps dev_caps;
};
static const uint64_t vdivs10to2000[] = {
SR_mV(10),
SR_mV(20),
SR_mV(50),
SR_mV(100),
SR_mV(200),
SR_mV(500),
SR_V(1),
SR_V(2),
0,
};
struct DSL_vga {
uint8_t id;
uint64_t key;
uint64_t vgain;
uint16_t voff;
uint16_t voff_comp;
};
static const struct DSL_vga vga_defaults[] = {
{1, 10, 0x162400, (32<<10)+558, (32<<10)+558},
{1, 20, 0x14C000, (32<<10)+558, (32<<10)+558},
{1, 50, 0x12E800, (32<<10)+558, (32<<10)+558},
{1, 100, 0x118000, (32<<10)+558, (32<<10)+558},
{1, 200, 0x102400, (32<<10)+558, (32<<10)+558},
{1, 500, 0x2E800, (32<<10)+558, (32<<10)+558},
{1, 1000, 0x18000, (32<<10)+558, (32<<10)+558},
{1, 2000, 0x02400, (32<<10)+558, (32<<10)+558},
{2, 10, 0x1DA800, 45, 1024-920-45},
{2, 20, 0x1A7200, 45, 1024-920-45},
{2, 50, 0x164200, 45, 1024-920-45},
{2, 100, 0x131800, 45, 1024-920-45},
{2, 200, 0xBD000, 45, 1024-920-45},
{2, 500, 0x7AD00, 45, 1024-920-45},
{2, 1000, 0x48800, 45, 1024-920-45},
{2, 2000, 0x12000, 45, 1024-920-45},
{3, 10, 0x1C5C00, 45, 1024-920-45},
{3, 20, 0x19EB00, 45, 1024-920-45},
{3, 50, 0x16AE00, 45, 1024-920-45},
{3, 100, 0x143D00, 45, 1024-920-45},
{3, 200, 0xB1000, 45, 1024-920-45},
{3, 500, 0x7F000, 45, 1024-920-45},
{3, 1000, 0x57200, 45, 1024-920-45},
{3, 2000, 0x2DD00, 45, 1024-920-45},
{0, 0, 0, 0, 0}
};
enum CHANNEL_ID {
DSL_STREAM20x16 = 0,
DSL_STREAM25x12,
DSL_STREAM50x6,
DSL_STREAM100x3,
DSL_BUFFER100x16,
DSL_BUFFER200x8,
DSL_BUFFER400x4,
DSL_ANALOG10x2,
DSL_DSO200x2,
};
struct DSL_channels {
enum CHANNEL_ID id;
enum OPERATION_MODE mode;
enum CHANNEL_TYPE type;
gboolean stream;
uint16_t num;
uint8_t unit_bits;
uint64_t min_samplerate;
uint64_t max_samplerate;
uint64_t hw_min_samplerate;
uint64_t hw_max_samplerate;
const char *descr;
};
static const struct DSL_channels channel_modes[] = {
// LA Stream
{DSL_STREAM20x16, LOGIC, SR_CHANNEL_LOGIC, TRUE, 16, 1, SR_KHZ(10), SR_MHZ(20),
SR_KHZ(10), SR_MHZ(100), "Use 16 Channels (Max 20MHz)"},
{DSL_STREAM25x12, LOGIC, SR_CHANNEL_LOGIC, TRUE, 12, 1, SR_KHZ(10), SR_MHZ(25),
SR_KHZ(10), SR_MHZ(100), "Use 12 Channels (Max 25MHz)"},
{DSL_STREAM50x6, LOGIC, SR_CHANNEL_LOGIC, TRUE, 6, 1, SR_KHZ(10), SR_MHZ(50),
SR_KHZ(10), SR_MHZ(100), "Use 6 Channels (Max 50MHz)"},
{DSL_STREAM100x3, LOGIC, SR_CHANNEL_LOGIC, TRUE, 3, 1, SR_KHZ(10), SR_MHZ(100),
SR_KHZ(10), SR_MHZ(100), "Use 3 Channels (Max 100MHz)"},
// LA Buffer
{DSL_BUFFER100x16, LOGIC, SR_CHANNEL_LOGIC, FALSE, 16, 1, SR_KHZ(10), SR_MHZ(100),
SR_KHZ(10), SR_MHZ(100), "Use Channels 0~15 (Max 100MHz)"},
{DSL_BUFFER200x8, LOGIC, SR_CHANNEL_LOGIC, FALSE, 8, 1, SR_KHZ(10), SR_MHZ(200),
SR_KHZ(10), SR_MHZ(100), "Use Channels 0~7 (Max 200MHz)"},
{DSL_BUFFER400x4, LOGIC, SR_CHANNEL_LOGIC, FALSE, 4, 1, SR_KHZ(10), SR_MHZ(400),
SR_KHZ(10), SR_MHZ(100), "Use Channels 0~3 (Max 400MHz)"},
// DAQ
{DSL_ANALOG10x2, ANALOG, SR_CHANNEL_ANALOG, TRUE, 2, 8, SR_HZ(10), SR_MHZ(10),
SR_KHZ(10), SR_MHZ(100), "Use Channels 0~1 (Max 10MHz)"},
// OSC
{DSL_DSO200x2, DSO, SR_CHANNEL_DSO, FALSE, 2, 8, SR_KHZ(10), SR_MHZ(200),
SR_KHZ(10), SR_MHZ(100), "Use Channels 0~1 (Max 200MHz)"}
};
static const struct DSL_profile supported_DSLogic[] = {
/*
* DSLogic
*/
{0x2A0E, 0x0001, NULL, "DSLogic", NULL,
{0x2A0E, 0x0001, "DreamSourceLab", "DSLogic", NULL,
"DSLogic.fw",
"DSLogic33.bin",
"DSLogic50.bin",
DEV_CAPS_16BIT},
{CAPS_MODE_LOGIC | CAPS_MODE_ANALOG | CAPS_MODE_DSO,
CAPS_FEATURE_SEEP | CAPS_FEATURE_BUF,
(1 << DSL_STREAM20x16) | (1 << DSL_STREAM25x12) | (1 << DSL_STREAM50x6) | (1 << DSL_STREAM100x3) |
(1 << DSL_BUFFER100x16) | (1 << DSL_BUFFER200x8) | (1 << DSL_BUFFER400x4) |
(1 << DSL_ANALOG10x2) |
(1 << DSL_DSO200x2),
SR_MB(256),
SR_Mn(2),
DSL_BUFFER100x16,
vdivs10to2000,
0,
DSL_STREAM20x16,
SR_MHZ(1),
SR_Mn(1),
0,
0}
},
{0x2A0E, 0x0003, NULL, "DSLogic Pro", NULL,
{0x2A0E, 0x0003, "DreamSourceLab", "DSLogic Pro", NULL,
"DSLogicPro.fw",
"DSLogicPro.bin",
"DSLogicPro.bin",
DEV_CAPS_16BIT},
{CAPS_MODE_LOGIC,
CAPS_FEATURE_SEEP | CAPS_FEATURE_VTH | CAPS_FEATURE_BUF,
(1 << DSL_STREAM20x16) | (1 << DSL_STREAM25x12) | (1 << DSL_STREAM50x6) | (1 << DSL_STREAM100x3) |
(1 << DSL_BUFFER100x16) | (1 << DSL_BUFFER200x8) | (1 << DSL_BUFFER400x4),
SR_MB(256),
0,
DSL_BUFFER100x16,
0,
0,
DSL_STREAM20x16,
SR_MHZ(1),
SR_Mn(1),
0,
0}
},
{0x2A0E, 0x0005, NULL, "DSMso", NULL,
"DSMso.fw",
"DSMso.bin",
"DSMso.bin",
DEV_CAPS_16BIT},
{0x2A0E, 0x0020, NULL, "DSLogic PLus", NULL,
{0x2A0E, 0x0020, "DreamSourceLab", "DSLogic PLus", NULL,
"DSLogicPlus.fw",
"DSLogicPlus.bin",
"DSLogicPlus.bin",
DEV_CAPS_16BIT},
{CAPS_MODE_LOGIC,
CAPS_FEATURE_VTH | CAPS_FEATURE_BUF,
(1 << DSL_STREAM20x16) | (1 << DSL_STREAM25x12) | (1 << DSL_STREAM50x6) | (1 << DSL_STREAM100x3) |
(1 << DSL_BUFFER100x16) | (1 << DSL_BUFFER200x8) | (1 << DSL_BUFFER400x4),
SR_MB(256),
0,
DSL_BUFFER100x16,
0,
0,
DSL_STREAM20x16,
SR_MHZ(1),
SR_Mn(1),
0,
0}
},
{0x2A0E, 0x0021, NULL, "DSLogic Basic", NULL,
{0x2A0E, 0x0021, "DreamSourceLab", "DSLogic Basic", NULL,
"DSLogicBasic.fw",
"DSLogicBasic.bin",
"DSLogicBasic.bin",
DEV_CAPS_16BIT},
{CAPS_MODE_LOGIC,
CAPS_FEATURE_VTH,
(1 << DSL_STREAM20x16) | (1 << DSL_STREAM25x12) | (1 << DSL_STREAM50x6) | (1 << DSL_STREAM100x3) |
(1 << DSL_BUFFER100x16) | (1 << DSL_BUFFER200x8) | (1 << DSL_BUFFER400x4),
SR_KB(256),
0,
DSL_STREAM20x16,
0,
0,
DSL_STREAM20x16,
SR_MHZ(1),
SR_Mn(1),
0,
0}
},
{ 0, 0, 0, 0, 0, 0, 0, 0, 0 }
{ 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}
};
static const struct DSL_profile supported_DSCope[] = {
/*
* DSCope
*/
{0x2A0E, 0x0002, NULL, "DSCope", NULL,
{0x2A0E, 0x0002, "DreamSourceLab", "DSCope", NULL,
"DSCope.fw",
"DSCope.bin",
"DSCope.bin",
DEV_CAPS_16BIT},
{CAPS_MODE_ANALOG | CAPS_MODE_DSO,
CAPS_FEATURE_ZERO | CAPS_FEATURE_PREOFF | CAPS_FEATURE_SEEP | CAPS_FEATURE_BUF,
(1 << DSL_ANALOG10x2) |
(1 << DSL_DSO200x2),
SR_MB(256),
SR_Mn(2),
0,
vdivs10to2000,
1,
DSL_DSO200x2,
SR_MHZ(100),
SR_Mn(1),
(129<<8)+167,
1024-920}
},
{0x2A0E, 0x0004, NULL, "DSCope20", NULL,
{0x2A0E, 0x0004, "DreamSourceLab", "DSCope20", NULL,
"DSCope20.fw",
"DSCope20.bin",
"DSCope20.bin",
DEV_CAPS_16BIT},
{CAPS_MODE_ANALOG | CAPS_MODE_DSO,
CAPS_FEATURE_ZERO | CAPS_FEATURE_SEEP | CAPS_FEATURE_BUF,
(1 << DSL_ANALOG10x2) |
(1 << DSL_DSO200x2),
SR_MB(256),
SR_Mn(2),
0,
vdivs10to2000,
2,
DSL_DSO200x2,
SR_MHZ(100),
SR_Mn(1),
920,
1024-920}
},
{0x2A0E, 0x0022, NULL, "DSCope B20", NULL,
{0x2A0E, 0x0022, "DreamSourceLab", "DSCope B20", NULL,
"DSCopeB20.fw",
"DSCope20.bin",
"DSCope20.bin",
DEV_CAPS_16BIT},
{CAPS_MODE_ANALOG | CAPS_MODE_DSO,
CAPS_FEATURE_ZERO | CAPS_FEATURE_BUF,
(1 << DSL_ANALOG10x2) |
(1 << DSL_DSO200x2),
SR_MB(256),
SR_Mn(2),
0,
vdivs10to2000,
2,
DSL_DSO200x2,
SR_MHZ(100),
SR_Mn(1),
920,
1024-920}
},
{0x2A0E, 0x0023, NULL, "DSCope C20", NULL,
{0x2A0E, 0x0023, "DreamSourceLab", "DSCope C20", NULL,
"DSCopeC20.fw",
"DSCopeC20.bin",
"DSCopeC20.bin",
DEV_CAPS_16BIT},
{CAPS_MODE_ANALOG | CAPS_MODE_DSO,
CAPS_FEATURE_ZERO | CAPS_FEATURE_BUF,
(1 << DSL_ANALOG10x2) |
(1 << DSL_DSO200x2),
SR_MB(256),
SR_Mn(2),
0,
vdivs10to2000,
3,
DSL_DSO200x2,
SR_MHZ(100),
SR_Mn(1),
920,
1024-920}
},
{0x2A0E, 0x0024, NULL, "DSCope C20P", NULL,
{0x2A0E, 0x0024, "DreamSourceLab", "DSCope C20P", NULL,
"DSCopeC20P.fw",
"DSCopeC20.bin",
"DSCopeC20.bin",
DEV_CAPS_16BIT},
"DSCopeC20P.bin",
"DSCopeC20P.bin",
{CAPS_MODE_ANALOG | CAPS_MODE_DSO,
CAPS_FEATURE_ZERO | CAPS_FEATURE_BUF,
(1 << DSL_ANALOG10x2) |
(1 << DSL_DSO200x2),
SR_MB(256),
SR_Mn(2),
0,
vdivs10to2000,
3,
DSL_DSO200x2,
SR_MHZ(100),
SR_Mn(1),
920,
1024-920}
},
{ 0, 0, 0, 0, 0, 0, 0, 0, 0 }
{0x2A0E, 0x0025, "DreamSourceLab", "DSCope C20", NULL,
"DSCopeC20B.fw",
"DSCopeC20B.bin",
"DSCopeC20B.bin",
{CAPS_MODE_ANALOG | CAPS_MODE_DSO,
CAPS_FEATURE_ZERO,
(1 << DSL_ANALOG10x2) |
(1 << DSL_DSO200x2),
SR_KB(256),
SR_Kn(20),
0,
vdivs10to2000,
3,
DSL_DSO200x2,
SR_MHZ(100),
SR_Kn(10),
920,
1024-920}
},
{ 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}
};
static const gboolean default_ms_en[] = {
@@ -329,7 +527,6 @@ struct DSL_context {
uint64_t actual_bytes;
/* Operational settings */
gboolean sample_wide;
gboolean clock_type;
gboolean clock_edge;
gboolean rle_mode;
@@ -339,9 +536,9 @@ struct DSL_context {
gboolean stream;
uint8_t test_mode;
uint16_t buf_options;
uint16_t ch_mode;
uint16_t samplerates_size;
uint16_t samplecounts_size;
enum CHANNEL_ID ch_mode;
uint16_t samplerates_min_index;
uint16_t samplerates_max_index;
uint16_t th_level;
double vth;
uint16_t filter;
@@ -365,7 +562,6 @@ struct DSL_context {
int zero_comb;
gboolean roll;
gboolean data_lock;
uint8_t unit_bits;
uint16_t unit_pitch;
uint64_t num_samples;
@@ -425,21 +621,59 @@ struct DSL_setting {
uint32_t end_sync;
};
struct DSL_vga {
uint64_t key;
uint64_t vgain0;
uint64_t vgain1;
uint16_t voff0;
uint16_t voff1;
static const uint64_t samplerates[] = {
SR_HZ(10),
SR_HZ(20),
SR_HZ(50),
SR_HZ(100),
SR_HZ(200),
SR_HZ(500),
SR_KHZ(1),
SR_KHZ(2),
SR_KHZ(5),
SR_KHZ(10),
SR_KHZ(20),
SR_KHZ(40),
SR_KHZ(50),
SR_KHZ(100),
SR_KHZ(200),
SR_KHZ(400),
SR_KHZ(500),
SR_MHZ(1),
SR_MHZ(2),
SR_MHZ(4),
SR_MHZ(5),
SR_MHZ(10),
SR_MHZ(20),
SR_MHZ(25),
SR_MHZ(40),
SR_MHZ(50),
SR_MHZ(100),
SR_MHZ(200),
SR_MHZ(400),
SR_MHZ(500),
SR_MHZ(800),
SR_GHZ(1),
SR_GHZ(2),
SR_GHZ(5),
SR_GHZ(10),
};
SR_PRIV int dsl_adjust_probes(struct sr_dev_inst *sdi, int num_probes);
SR_PRIV int dsl_setup_probes(struct sr_dev_inst *sdi, int num_probes);
SR_PRIV const GSList *dsl_mode_list(const struct sr_dev_inst *sdi);
SR_PRIV void dsl_adjust_samplerate(struct DSL_context *devc);
SR_PRIV int dsl_en_ch_num(const struct sr_dev_inst *sdi);
SR_PRIV gboolean dsl_check_conf_profile(libusb_device *dev);
SR_PRIV int dsl_configure_probes(const struct sr_dev_inst *sdi);
SR_PRIV uint64_t dsl_channel_depth(const struct sr_dev_inst *sdi);
SR_PRIV int dsl_wr_reg(const struct sr_dev_inst *sdi, uint8_t addr, uint8_t value);
SR_PRIV int dsl_rd_reg(const struct sr_dev_inst *sdi, uint8_t addr, uint8_t *value);
SR_PRIV int dsl_wr_ext(const struct sr_dev_inst *sdi, uint8_t addr, uint8_t value);
SR_PRIV int dsl_rd_ext(const struct sr_dev_inst *sdi, unsigned char *ctx, uint16_t addr, uint8_t len);
SR_PRIV int dsl_wr_dso(const struct sr_dev_inst *sdi, uint64_t cmd);
SR_PRIV int dsl_wr_nvm(const struct sr_dev_inst *sdi, unsigned char *ctx, uint16_t addr, uint8_t len);
SR_PRIV int dsl_rd_nvm(const struct sr_dev_inst *sdi, unsigned char *ctx, uint16_t addr, uint8_t len);
@@ -450,6 +684,8 @@ SR_PRIV int dsl_fpga_config(struct libusb_device_handle *hdl, const char *filena
SR_PRIV int dsl_config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
const struct sr_channel *ch,
const struct sr_channel_group *cg);
SR_PRIV int dsl_config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
const struct sr_channel_group *cg);
SR_PRIV int dsl_dev_open(struct sr_dev_driver *di, struct sr_dev_inst *sdi, gboolean *fpga_done);
SR_PRIV int dsl_dev_close(struct sr_dev_inst *sdi);

614
libsigrok4DSL/hardware/DSL/dslogic.c
View File

@@ -25,16 +25,6 @@
#include "command.h"
static struct sr_dev_mode mode_list[] = {
{"LA", LOGIC},
{"DAQ", ANALOG},
{"OSC", DSO},
};
static struct sr_dev_mode pro_mode_list[] = {
{"LA", LOGIC},
};
enum {
/** Buffer mode */
OP_BUFFER = 0,
@@ -60,32 +50,6 @@ static const char *bufoptions[] = {
"Upload captured data",
};
static const char *stream_ch_modes[] = {
"Use 16 Channels (Max 20MHz)",
"Use 12 Channels (Max 25MHz)",
"Use 6 Channels (Max 50MHz)",
"Use 3 Channels (Max 100MHz)",
};
static const uint16_t stream_ch_num[] = {
16,
12,
6,
3,
};
static const char *buffer_ch_modes[] = {
"Use Channels 0~15 (Max 100MHz)",
"Use Channels 0~7 (Max 200MHz)",
"Use Channels 0~3 (Max 400MHz)",
};
static const uint16_t buffer_ch_num[] = {
MAX_LOGIC_PROBES,
MAX_LOGIC_PROBES / 2,
MAX_LOGIC_PROBES / 4,
};
static const char *thresholds[] = {
"1.8/2.5/3.3V Level",
"5.0V Level",
@@ -104,20 +68,6 @@ static const char *maxHeights[] = {
"5X",
};
static const int32_t hwopts[] = {
SR_CONF_CONN,
};
static const int32_t hwcaps[] = {
SR_CONF_LOGIC_ANALYZER,
SR_CONF_TRIGGER_TYPE,
SR_CONF_SAMPLERATE,
/* These are really implemented in the driver, not the hardware. */
SR_CONF_LIMIT_SAMPLES,
SR_CONF_CONTINUOUS,
};
static const int32_t hwoptions[] = {
SR_CONF_OPERATION_MODE,
SR_CONF_BUFFER_OPTIONS,
@@ -179,171 +129,30 @@ static const int32_t sessions_pro[] = {
SR_CONF_TRIGGER_MARGIN,
};
static const char *probe_names[] = {
"0", "1", "2", "3", "4", "5", "6", "7",
"8", "9", "10", "11", "12", "13", "14", "15",
NULL,
};
static const uint64_t samplerates[] = {
SR_KHZ(10),
SR_KHZ(20),
SR_KHZ(50),
SR_KHZ(100),
SR_KHZ(200),
SR_KHZ(500),
SR_MHZ(1),
SR_MHZ(2),
SR_MHZ(5),
SR_MHZ(10),
SR_MHZ(20),
SR_MHZ(25),
SR_MHZ(50),
SR_MHZ(100),
SR_MHZ(200),
SR_MHZ(400),
};
//static const uint64_t samplecounts[] = {
// SR_KB(1),
// SR_KB(2),
// SR_KB(5),
// SR_KB(10),
// SR_KB(20),
// SR_KB(50),
// SR_KB(100),
// SR_KB(200),
// SR_KB(500),
// SR_MB(1),
// SR_MB(2),
// SR_MB(5),
// SR_MB(10),
// SR_MB(16),
//};
static const uint64_t samplecounts[] = {
SR_KB(1),
SR_KB(2),
SR_KB(4),
SR_KB(8),
SR_KB(16),
SR_KB(32),
SR_KB(64),
SR_KB(128),
SR_KB(256),
SR_KB(512),
SR_MB(1),
SR_MB(2),
SR_MB(4),
SR_MB(8),
SR_MB(16),
SR_MB(32),
SR_MB(64),
SR_MB(128),
SR_MB(256),
SR_MB(512),
SR_GB(1),
SR_GB(2),
SR_GB(4),
SR_GB(8),
SR_GB(16),
};
static uint16_t opmodes_show_count = 3;
SR_PRIV struct sr_dev_driver DSLogic_driver_info;
static struct sr_dev_driver *di = &DSLogic_driver_info;
static int counts_size(const struct sr_dev_inst *sdi)
{
struct DSL_context *devc = sdi->priv;
if (strcmp(sdi->model, "DSLogic Basic") == 0)
if (sdi->mode == ANALOG)
return 5;
else if (!devc || devc->stream)
return ARRAY_SIZE(samplecounts);
else
return 15;
else
if (sdi->mode == ANALOG)
return 15;
else
return ARRAY_SIZE(samplecounts);
}
static void probe_init(struct sr_dev_inst *sdi)
{
int i;
GSList *l;
for (l = sdi->channels; l; l = l->next) {
struct sr_channel *probe = (struct sr_channel *)l->data;
if (sdi->mode == DSO) {
probe->vdiv = 1000;
probe->vfactor = 1;
probe->vpos = 0;
probe->coupling = SR_DC_COUPLING;
probe->trig_value = 0x80;
probe->ms_show = TRUE;
for (i = DSO_MS_BEGIN; i < DSO_MS_END; i++)
probe->ms_en[i] = default_ms_en[i];
}
}
}
static int setup_probes(struct sr_dev_inst *sdi, int num_probes)
{
uint16_t j;
struct sr_channel *probe;
for (j = 0; j < num_probes; j++) {
if (!(probe = sr_channel_new(j, (sdi->mode == LOGIC) ? SR_CHANNEL_LOGIC : ((sdi->mode == DSO) ? SR_CHANNEL_DSO : SR_CHANNEL_ANALOG),
TRUE, probe_names[j])))
return SR_ERR;
sdi->channels = g_slist_append(sdi->channels, probe);
}
probe_init(sdi);
return SR_OK;
}
static int adjust_probes(struct sr_dev_inst *sdi, int num_probes)
{
uint16_t j;
struct sr_channel *probe;
assert(num_probes > 0);
j = g_slist_length(sdi->channels);
while(j < num_probes) {
if (!(probe = sr_channel_new(j, (sdi->mode == LOGIC) ? SR_CHANNEL_LOGIC : ((sdi->mode == DSO) ? SR_CHANNEL_DSO : SR_CHANNEL_ANALOG),
TRUE, probe_names[j])))
return SR_ERR;
sdi->channels = g_slist_append(sdi->channels, probe);
j++;
}
while(j > num_probes) {
sdi->channels = g_slist_delete_link(sdi->channels, g_slist_last(sdi->channels));
j--;
}
return SR_OK;
}
static struct DSL_context *DSLogic_dev_new(const struct sr_dev_inst *sdi)
static struct DSL_context *DSLogic_dev_new(const struct DSL_profile *prof)
{
struct DSL_context *devc;
unsigned int i;
if (!(devc = g_try_malloc(sizeof(struct DSL_context)))) {
sr_err("Device context malloc failed.");
return NULL;
}
for (i = 0; i < ARRAY_SIZE(channel_modes); i++)
assert(channel_modes[i].id == i);
devc->channel = NULL;
devc->profile = NULL;
devc->profile = prof;
devc->fw_updated = 0;
devc->cur_samplerate = DEFAULT_SAMPLERATE;
devc->limit_samples = DEFAULT_SAMPLELIMIT;
devc->sample_wide = TRUE;
devc->cur_samplerate = devc->profile->dev_caps.default_samplerate;
devc->limit_samples = devc->profile->dev_caps.default_samplelimit;
devc->clock_type = FALSE;
devc->clock_edge = FALSE;
devc->rle_mode = FALSE;
@@ -352,9 +161,7 @@ static struct DSL_context *DSLogic_dev_new(const struct sr_dev_inst *sdi)
devc->test_mode = SR_TEST_NONE;
devc->stream = (devc->op_mode == OP_STREAM);
devc->buf_options = SR_BUF_UPLOAD;
devc->ch_mode = 0;
devc->samplerates_size = 11;
devc->samplecounts_size = counts_size(sdi);
devc->ch_mode = devc->profile->dev_caps.default_channelmode;
devc->th_level = SR_TH_3V3;
devc->vth = 1.0;
devc->filter = SR_FILTER_NONE;
@@ -369,10 +176,11 @@ static struct DSL_context *DSLogic_dev_new(const struct sr_dev_inst *sdi)
devc->mstatus_valid = FALSE;
devc->data_lock = FALSE;
devc->max_height = 0;
devc->unit_bits = 8;
devc->trigger_margin = 8;
devc->trigger_channel = 0;
dsl_adjust_samplerate(devc);
return devc;
}
@@ -397,7 +205,7 @@ static GSList *scan(GSList *options)
GSList *l, *devices, *conn_devices;
struct libusb_device_descriptor des;
libusb_device **devlist;
int devcnt, num_logic_probes, ret, i, j;
int devcnt, ret, i, j;
const char *conn;
drvc = di->priv;
@@ -453,23 +261,25 @@ static GSList *scan(GSList *options)
continue;
devcnt = g_slist_length(drvc->instances);
sdi = sr_dev_inst_new(LOGIC, devcnt, SR_ST_INITIALIZING,
devc = DSLogic_dev_new(prof);
if (!devc)
return NULL;
sdi = sr_dev_inst_new(channel_modes[devc->ch_mode].mode, devcnt, SR_ST_INITIALIZING,
prof->vendor, prof->model, prof->model_version);
if (!sdi)
if (!sdi) {
g_free(devc);
return NULL;
}
sdi->priv = devc;
sdi->driver = di;
/* Fill in probelist according to this device's profile. */
num_logic_probes = prof->dev_caps & DEV_CAPS_16BIT ? 16 : 8;
if (setup_probes(sdi, num_logic_probes) != SR_OK)
return NULL;
devc = DSLogic_dev_new(sdi);
devc->profile = prof;
sdi->priv = devc;
drvc->instances = g_slist_append(drvc->instances, sdi);
//devices = g_slist_append(devices, sdi);
/* Fill in probelist according to this device's profile. */
if (dsl_setup_probes(sdi, channel_modes[devc->ch_mode].num) != SR_OK)
return NULL;
if (dsl_check_conf_profile(devlist[i])) {
/* Already has the firmware, so fix the new address. */
sr_dbg("Found an DSLogic device.");
@@ -511,21 +321,9 @@ static GSList *dev_list(void)
return ((struct drv_context *)(di->priv))->instances;
}
static GSList *dev_mode_list(const struct sr_dev_inst *sdi)
static const GSList *dev_mode_list(const struct sr_dev_inst *sdi)
{
GSList *l = NULL;
unsigned int i;
if (strcmp(sdi->model, "DSLogic") == 0) {
for(i = 0; i < ARRAY_SIZE(mode_list); i++) {
l = g_slist_append(l, &mode_list[i]);
}
} else {
for(i = 0; i < ARRAY_SIZE(pro_mode_list); i++) {
l = g_slist_append(l, &pro_mode_list[i]);
}
}
return l;
return dsl_mode_list(sdi);
}
static uint64_t dso_cmd_gen(const struct sr_dev_inst *sdi, struct sr_channel* ch, int id)
@@ -534,7 +332,7 @@ static uint64_t dso_cmd_gen(const struct sr_dev_inst *sdi, struct sr_channel* ch
uint64_t cmd = 0;
int channel_cnt = 0;
GSList *l;
struct sr_channel *en_probe;
struct sr_channel *en_probe = ch;
devc = sdi->priv;
@@ -583,20 +381,16 @@ static uint64_t dso_cmd_gen(const struct sr_dev_inst *sdi, struct sr_channel* ch
}
// --Channel
if(channel_cnt == 1)
cmd += 0xC00000;
else if(ch->index == 0)
cmd += 0x400000;
else if(ch->index == 1)
cmd += 0x800000;
else
cmd += 0x000000;
// if(ch->index == 0)
// cmd += 0x400000;
// else if(ch->index == 1)
// cmd += 0x800000;
// else
// cmd += 0x000000;
if (sdi->mode != LOGIC) {
if(channel_cnt == 1)
cmd += 0xC00000;
else if(ch->index == 0)
cmd += 0x400000;
else if(ch->index == 1)
cmd += 0x800000;
else
cmd += 0x000000;
}
// --Header
cmd += 0x55000000;
@@ -607,7 +401,7 @@ static uint64_t dso_cmd_gen(const struct sr_dev_inst *sdi, struct sr_channel* ch
channel_cnt += probe->enabled;
}
cmd += 0x18;
uint32_t divider = (uint32_t)ceil(DSLOGIC_MAX_DSO_SAMPLERATE * 1.0 / devc->cur_samplerate / channel_cnt);
uint32_t divider = (uint32_t)ceil(channel_modes[devc->ch_mode].max_samplerate * 1.0 / devc->cur_samplerate / channel_cnt);
cmd += divider << 8;
break;
case SR_CONF_HORIZ_TRIGGERPOS:
@@ -708,7 +502,7 @@ static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
const struct sr_channel *ch,
const struct sr_channel_group *cg)
{
struct DSL_context *devc;
struct DSL_context *devc = sdi->priv;
int ret;
ret = dsl_config_get(id, data, sdi, ch, cg);
@@ -717,41 +511,35 @@ static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
case SR_CONF_OPERATION_MODE:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_string(opmodes[devc->op_mode]);
break;
case SR_CONF_FILTER:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_string(filters[devc->filter]);
break;
case SR_CONF_RLE:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_boolean(devc->rle_mode);
break;
case SR_CONF_TEST:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_boolean(devc->test_mode != SR_TEST_NONE);
break;
case SR_CONF_ACTUAL_SAMPLES:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_uint64(devc->actual_samples);
break;
case SR_CONF_WAIT_UPLOAD:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
if (devc->buf_options == SR_BUF_UPLOAD &&
devc->status == DSL_START) {
devc->status = DSL_ABORT;
dsl_wr_reg(sdi, EEWP_ADDR, bmFORCE_STOP);
dsl_wr_reg(sdi, CTR0_ADDR, bmFORCE_STOP);
*data = g_variant_new_boolean(TRUE);
} else {
*data = g_variant_new_boolean(FALSE);
@@ -760,81 +548,57 @@ static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
case SR_CONF_BUFFER_OPTIONS:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_string(bufoptions[devc->buf_options]);
break;
case SR_CONF_CHANNEL_MODE:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
if (devc->stream)
*data = g_variant_new_string(stream_ch_modes[devc->ch_mode]);
else
*data = g_variant_new_string(buffer_ch_modes[devc->ch_mode]);
*data = g_variant_new_string(channel_modes[devc->ch_mode].descr);
break;
case SR_CONF_MAX_HEIGHT:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_string(maxHeights[devc->max_height]);
break;
case SR_CONF_MAX_HEIGHT_VALUE:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_byte(devc->max_height);
break;
case SR_CONF_THRESHOLD:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_string(thresholds[devc->th_level]);
break;
case SR_CONF_VTH:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_double(devc->vth);
break;
case SR_CONF_ZERO:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
if (sdi->mode == DSO)
*data = g_variant_new_boolean(devc->zero);
else
*data = g_variant_new_boolean(FALSE);
break;
case SR_CONF_STREAM:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_boolean(devc->stream);
break;
case SR_CONF_MAX_DSO_SAMPLERATE:
if (!sdi)
return SR_ERR;
*data = g_variant_new_uint64(DSLOGIC_MAX_DSO_SAMPLERATE);
*data = g_variant_new_uint64(channel_modes[devc->ch_mode].max_samplerate);
break;
case SR_CONF_MAX_DSO_SAMPLELIMITS:
if (!sdi)
return SR_ERR;
*data = g_variant_new_uint64(DSLOGIC_MAX_DSO_DEPTH);
*data = g_variant_new_uint64(devc->profile->dev_caps.dso_depth);
break;
case SR_CONF_HW_DEPTH:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
*data = g_variant_new_uint64(dsl_channel_depth(sdi));
break;
case SR_CONF_VLD_CH_NUM:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
if (devc->stream)
*data = g_variant_new_int16(stream_ch_num[devc->ch_mode]);
else
*data = g_variant_new_int16(buffer_ch_num[devc->ch_mode]);
*data = g_variant_new_int16(channel_modes[devc->ch_mode].num);
break;
default:
return SR_ERR_NA;
@@ -850,17 +614,16 @@ static int config_set(int id, GVariant *data, struct sr_dev_inst *sdi,
{
struct DSL_context *devc;
const char *stropt;
int ret, num_probes;
int ret, num_probes = 0;
struct sr_usb_dev_inst *usb;
unsigned int i;
struct drv_context *drvc;
(void)cg;
if (sdi->status != SR_ST_ACTIVE)
if (sdi->status != SR_ST_ACTIVE) {
return SR_ERR;
}
drvc = di->priv;
devc = sdi->priv;
usb = sdi->conn;
@@ -874,13 +637,9 @@ static int config_set(int id, GVariant *data, struct sr_dev_inst *sdi,
devc->clock_edge = g_variant_get_boolean(data);
} else if (id == SR_CONF_LIMIT_SAMPLES) {
devc->limit_samples = g_variant_get_uint64(data);
} else if (id == SR_CONF_DATALOCK) {
while(libusb_try_lock_events(drvc->sr_ctx->libusb_ctx));
devc->data_lock = g_variant_get_boolean(data);
libusb_unlock_events(drvc->sr_ctx->libusb_ctx);
} else if (id == SR_CONF_PROBE_VDIV) {
ch->vdiv = g_variant_get_uint64(data);
if (sdi->mode == DSO) {
if (sdi->mode != LOGIC) {
ret = dsl_wr_dso(sdi, dso_cmd_gen(sdi, ch, SR_CONF_PROBE_VDIV));
}
if (ret == SR_OK)
@@ -899,7 +658,7 @@ static int config_set(int id, GVariant *data, struct sr_dev_inst *sdi,
ch->coupling = g_variant_get_byte(data);
if (ch->coupling == SR_GND_COUPLING)
ch->coupling = SR_DC_COUPLING;
if (sdi->mode == DSO) {
if (sdi->mode != LOGIC) {
ret = dsl_wr_dso(sdi, dso_cmd_gen(sdi, ch, SR_CONF_PROBE_COUPLING));
}
if (ret == SR_OK)
@@ -973,11 +732,8 @@ static int config_set(int id, GVariant *data, struct sr_dev_inst *sdi,
} else if (id == SR_CONF_SAMPLERATE) {
if (devc->test_mode == SR_TEST_NONE) {
devc->cur_samplerate = g_variant_get_uint64(data);
if(sdi->mode == DSO) {
devc->sample_wide = (devc->cur_samplerate <= DSLOGIC_MAX_DSO_SAMPLERATE);
if(sdi->mode != LOGIC) {
ret = dsl_wr_dso(sdi, dso_cmd_gen(sdi, 0, SR_CONF_SAMPLERATE));
} else {
devc->sample_wide = (devc->cur_samplerate <= DSLOGIC_MAX_LOGIC_SAMPLERATE);
}
}
} else if (id == SR_CONF_FILTER) {
@@ -998,38 +754,67 @@ static int config_set(int id, GVariant *data, struct sr_dev_inst *sdi,
devc->instant = g_variant_get_boolean(data);
if (dsl_en_ch_num(sdi) != 0) {
if (devc->instant)
devc->limit_samples = DSLOGIC_INSTANT_DEPTH / dsl_en_ch_num(sdi);
devc->limit_samples = devc->profile->dev_caps.hw_depth / dsl_en_ch_num(sdi);
else
devc->limit_samples = DSLOGIC_MAX_DSO_DEPTH / dsl_en_ch_num(sdi);
devc->limit_samples = devc->profile->dev_caps.dso_depth / dsl_en_ch_num(sdi);
}
}
} else if (id == SR_CONF_DEVICE_MODE) {
sdi->mode = g_variant_get_int16(data);
if (sdi->mode == LOGIC) {
dsl_wr_reg(sdi, EEWP_ADDR, bmSCOPE_CLR);
num_probes = devc->profile->dev_caps & DEV_CAPS_16BIT ? 16 : 8;
dsl_wr_reg(sdi, CTR0_ADDR, bmSCOPE_CLR);
for (i = 0; i < ARRAY_SIZE(channel_modes); i++) {
if (channel_modes[i].mode == LOGIC &&
devc->profile->dev_caps.channels & (1 << i)) {
devc->ch_mode = channel_modes[i].id;
num_probes = channel_modes[i].num;
devc->stream = channel_modes[i].stream;
dsl_adjust_samplerate(devc);
break;
}
}
} else if (sdi->mode == DSO) {
dsl_wr_reg(sdi, EEWP_ADDR, bmSCOPE_SET);
num_probes = devc->profile->dev_caps & DEV_CAPS_16BIT ? MAX_DSO_PROBES_NUM : 1;
dsl_wr_reg(sdi, CTR0_ADDR, bmSCOPE_SET);
ret = dsl_wr_dso(sdi, dso_cmd_gen(sdi, NULL, SR_CONF_DSO_SYNC));
if (ret != SR_OK)
sr_dbg("%s: DSO configuration sync failed", __func__);
devc->cur_samplerate = DSLOGIC_MAX_DSO_SAMPLERATE / num_probes;
devc->limit_samples = DSLOGIC_MAX_DSO_DEPTH / num_probes;
devc->samplerates_size = 15;
} else {
dsl_wr_reg(sdi, EEWP_ADDR, bmSCOPE_CLR);
num_probes = devc->profile->dev_caps & DEV_CAPS_16BIT ? MAX_ANALOG_PROBES_NUM : 1;
for (i = 0; i < ARRAY_SIZE(channel_modes); i++) {
if (channel_modes[i].mode == DSO &&
devc->profile->dev_caps.channels & (1 << i)) {
devc->ch_mode = channel_modes[i].id;
num_probes = channel_modes[i].num;
devc->stream = channel_modes[i].stream;
devc->cur_samplerate = channel_modes[i].max_samplerate / num_probes;
dsl_adjust_samplerate(devc);
break;
}
}
devc->limit_samples = devc->profile->dev_caps.dso_depth / num_probes;
} else if (sdi->mode == ANALOG) {
dsl_wr_reg(sdi, CTR0_ADDR, bmSCOPE_SET);
ret = dsl_wr_dso(sdi, dso_cmd_gen(sdi, NULL, SR_CONF_DSO_SYNC));
if (ret != SR_OK)
sr_dbg("%s: DAQ configuration sync failed", __func__);
devc->op_mode = OP_STREAM;
devc->test_mode = SR_TEST_NONE;
devc->stream = TRUE;
devc->samplerates_size = 10;
for (i = 0; i < ARRAY_SIZE(channel_modes); i++) {
if (channel_modes[i].mode == ANALOG &&
devc->profile->dev_caps.channels & (1 << i)) {
devc->ch_mode = channel_modes[i].id;
num_probes = channel_modes[i].num;
devc->stream = channel_modes[i].stream;
dsl_adjust_samplerate(devc);
break;
}
}
} else {
ret = SR_ERR;
}
devc->samplecounts_size = counts_size(sdi);
assert(num_probes != 0);
sr_dev_probes_free(sdi);
setup_probes(sdi, num_probes);
dsl_setup_probes(sdi, num_probes);
sr_dbg("%s: setting mode to %d", __func__, sdi->mode);
if (sdi->mode == DSO) {
if (sdi->mode != LOGIC) {
dso_init(sdi);
}
} else if (id == SR_CONF_OPERATION_MODE) {
@@ -1039,70 +824,43 @@ static int config_set(int id, GVariant *data, struct sr_dev_inst *sdi,
devc->op_mode = OP_BUFFER;
devc->test_mode = SR_TEST_NONE;
devc->stream = FALSE;
devc->ch_mode = 0;
devc->samplerates_size = 14;
adjust_probes(sdi, MAX_LOGIC_PROBES);
for (i = 0; i < ARRAY_SIZE(channel_modes); i++) {
if (channel_modes[i].mode == LOGIC &&
channel_modes[i].stream == devc->stream &&
devc->profile->dev_caps.channels & (1 << i)) {
devc->ch_mode = channel_modes[i].id;
break;
}
}
} else if (!strcmp(stropt, opmodes[OP_STREAM]) && (devc->op_mode != OP_STREAM)) {
devc->op_mode = OP_STREAM;
devc->test_mode = SR_TEST_NONE;
devc->stream = TRUE;
devc->ch_mode = 0;
devc->samplerates_size = 11;
adjust_probes(sdi, MAX_LOGIC_PROBES);
for (i = 0; i < ARRAY_SIZE(channel_modes); i++) {
if (channel_modes[i].mode == LOGIC &&
channel_modes[i].stream == devc->stream &&
devc->profile->dev_caps.channels & (1 << i)) {
devc->ch_mode = channel_modes[i].id;
break;
}
}
} else if (!strcmp(stropt, opmodes[OP_INTEST]) && (devc->op_mode != OP_INTEST)) {
devc->op_mode = OP_INTEST;
devc->test_mode = SR_TEST_INTERNAL;
if (strcmp(sdi->model, "DSLogic Basic") == 0) {
devc->stream = TRUE;
devc->samplerates_size = 10;
} else {
devc->stream = FALSE;
devc->samplerates_size = 14;
}
devc->ch_mode = 0;
adjust_probes(sdi, MAX_LOGIC_PROBES);
devc->limit_samples = DSLOGIC_MAX_LOGIC_DEPTH;
devc->cur_samplerate = DSLOGIC_MAX_LOGIC_SAMPLERATE;
devc->sample_wide = TRUE;
} else if (!strcmp(stropt, opmodes[OP_EXTEST]) && (devc->op_mode != OP_EXTEST)) {
devc->op_mode = OP_EXTEST;
devc->test_mode = SR_TEST_EXTERNAL;
if (strcmp(sdi->model, "DSLogic Basic") == 0) {
devc->stream = TRUE;
devc->samplerates_size = 11;
} else {
devc->stream = FALSE;
devc->samplerates_size = 14;
}
devc->ch_mode = 0;
adjust_probes(sdi, MAX_LOGIC_PROBES);
devc->limit_samples = DSLOGIC_MAX_LOGIC_DEPTH;
devc->cur_samplerate = DSLOGIC_MAX_LOGIC_SAMPLERATE;
devc->sample_wide = TRUE;
} else if (!strcmp(stropt, opmodes[OP_LPTEST]) && (devc->op_mode != OP_LPTEST)) {
devc->op_mode = OP_LPTEST;
devc->test_mode = SR_TEST_LOOPBACK;
devc->stream = FALSE;
devc->ch_mode = 0;
devc->samplerates_size = 14;
adjust_probes(sdi, MAX_LOGIC_PROBES);
devc->limit_samples = DSLOGIC_MAX_LOGIC_DEPTH;
devc->cur_samplerate = DSLOGIC_MAX_LOGIC_SAMPLERATE;
devc->sample_wide = TRUE;
devc->ch_mode = devc->profile->dev_caps.intest_channel;
devc->stream = !(devc->profile->dev_caps.feature_caps & CAPS_FEATURE_BUF);
} else {
ret = SR_ERR;
}
if (devc->cur_samplerate > samplerates[devc->samplerates_size-1]) {
devc->cur_samplerate = samplerates[devc->samplerates_size-1];
devc->sample_wide = (devc->cur_samplerate <= DSLOGIC_MAX_DSO_SAMPLERATE);
dsl_adjust_probes(sdi, channel_modes[devc->ch_mode].num);
dsl_adjust_samplerate(devc);
if (devc->op_mode == OP_INTEST) {
devc->cur_samplerate = devc->stream ? channel_modes[devc->ch_mode].max_samplerate / 2 :
channel_modes[devc->ch_mode].max_samplerate;
devc->limit_samples = devc->stream ? devc->cur_samplerate * 3 :
devc->profile->dev_caps.hw_depth / dsl_en_ch_num(sdi);
}
} else if (sdi->mode == ANALOG) {
devc->op_mode = OP_STREAM;
devc->test_mode = SR_TEST_NONE;
devc->stream = TRUE;
devc->samplerates_size = 10;
}
devc->samplecounts_size = counts_size(sdi);
sr_dbg("%s: setting pattern to %d",
__func__, devc->op_mode);
} else if (id == SR_CONF_BUFFER_OPTIONS) {
@@ -1116,27 +874,14 @@ static int config_set(int id, GVariant *data, struct sr_dev_inst *sdi,
} else if (id == SR_CONF_CHANNEL_MODE) {
stropt = g_variant_get_string(data, NULL);
if (sdi->mode == LOGIC) {
if (devc->stream) {
for (i = 0; i < ARRAY_SIZE(stream_ch_modes); i++)
if (!strcmp(stropt, stream_ch_modes[i])) {
devc->ch_mode = i;
devc->samplerates_size = 11 + i;
adjust_probes(sdi, MAX_LOGIC_PROBES);
break;
}
} else {
for (i = 0; i < ARRAY_SIZE(buffer_ch_modes); i++)
if (!strcmp(stropt, buffer_ch_modes[i])) {
devc->ch_mode = i;
devc->samplerates_size = 14 + i;
adjust_probes(sdi, buffer_ch_num[i]);
break;
}
}
if (devc->cur_samplerate > samplerates[devc->samplerates_size-1]) {
devc->cur_samplerate = samplerates[devc->samplerates_size-1];
devc->sample_wide = (devc->cur_samplerate <= DSLOGIC_MAX_DSO_SAMPLERATE);
for (i = 0; i < ARRAY_SIZE(channel_modes); i++) {
if (!strcmp(stropt, channel_modes[i].descr)) {
devc->ch_mode = channel_modes[i].id;
break;
}
}
dsl_adjust_probes(sdi, channel_modes[devc->ch_mode].num);
dsl_adjust_samplerate(devc);
}
sr_dbg("%s: setting channel mode to %d",
__func__, devc->ch_mode);
@@ -1223,8 +968,25 @@ static int config_set(int id, GVariant *data, struct sr_dev_inst *sdi,
else
sr_dbg("%s: setting DSO Trigger Source to %d failed",
__func__, devc->trigger_source);
} else if (id == SR_CONF_TRIGGER_CHANNEL) {
devc->trigger_source = (g_variant_get_byte(data) << 4) + (devc->trigger_source & 0x0f);
if (sdi->mode == DSO) {
ret = dsl_wr_dso(sdi, dso_cmd_gen(sdi, NULL, SR_CONF_TRIGGER_SOURCE));
}
if (ret == SR_OK)
sr_dbg("%s: setting DSO Trigger Source to %d",
__func__, devc->trigger_source);
else
sr_dbg("%s: setting DSO Trigger Source to %d failed",
__func__, devc->trigger_source);
} else if (id == SR_CONF_STREAM) {
devc->stream = g_variant_get_boolean(data);
} else if (id == SR_CONF_PROBE_MAP_UNIT) {
ch->map_unit = g_variant_get_string(data, NULL);
} else if (id == SR_CONF_PROBE_MAP_MIN) {
ch->map_min = g_variant_get_double(data);
} else if (id == SR_CONF_PROBE_MAP_MAX) {
ch->map_max = g_variant_get_double(data);
} else {
ret = SR_ERR_NA;
}
@@ -1236,63 +998,33 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
const struct sr_channel_group *cg)
{
struct DSL_context *devc;
GVariant *gvar;
GVariantBuilder gvb;
GVariantBuilder gvb;
unsigned int i;
//(void)sdi;
(void)cg;
devc = sdi->priv;
if (dsl_config_list(key, data, sdi, cg) == SR_OK) {
return SR_OK;
}
switch (key) {
case SR_CONF_SCAN_OPTIONS:
// *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
// hwopts, ARRAY_SIZE(hwopts), sizeof(int32_t));
*data = g_variant_new_from_data(G_VARIANT_TYPE("ai"),
hwopts, ARRAY_SIZE(hwopts)*sizeof(int32_t), TRUE, NULL, NULL);
break;
case SR_CONF_DEVICE_OPTIONS:
// *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
// hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
*data = g_variant_new_from_data(G_VARIANT_TYPE("ai"),
hwcaps, ARRAY_SIZE(hwcaps)*sizeof(int32_t), TRUE, NULL, NULL);
break;
case SR_CONF_DEVICE_CONFIGS:
// *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
// hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
if (strcmp(sdi->model, "DSLogic") == 0)
*data = g_variant_new_from_data(G_VARIANT_TYPE("ai"),
hwoptions, ARRAY_SIZE(hwoptions)*sizeof(int32_t), TRUE, NULL, NULL);
else
if (devc->profile->dev_caps.feature_caps & CAPS_FEATURE_VTH)
*data = g_variant_new_from_data(G_VARIANT_TYPE("ai"),
hwoptions_pro, ARRAY_SIZE(hwoptions_pro)*sizeof(int32_t), TRUE, NULL, NULL);
break;
case SR_CONF_DEVICE_SESSIONS:
if (strcmp(sdi->model, "DSLogic") == 0)
*data = g_variant_new_from_data(G_VARIANT_TYPE("ai"),
sessions, ARRAY_SIZE(sessions)*sizeof(int32_t), TRUE, NULL, NULL);
else
*data = g_variant_new_from_data(G_VARIANT_TYPE("ai"),
hwoptions, ARRAY_SIZE(hwoptions)*sizeof(int32_t), TRUE, NULL, NULL);
break;
case SR_CONF_DEVICE_SESSIONS:
if (devc->profile->dev_caps.feature_caps & CAPS_FEATURE_VTH)
*data = g_variant_new_from_data(G_VARIANT_TYPE("ai"),
sessions_pro, ARRAY_SIZE(sessions_pro)*sizeof(int32_t), TRUE, NULL, NULL);
else
*data = g_variant_new_from_data(G_VARIANT_TYPE("ai"),
sessions, ARRAY_SIZE(sessions)*sizeof(int32_t), TRUE, NULL, NULL);
break;
case SR_CONF_SAMPLERATE:
g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
// gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
// ARRAY_SIZE(samplerates), sizeof(uint64_t));
gvar = g_variant_new_from_data(G_VARIANT_TYPE("at"),
samplerates, devc->samplerates_size*sizeof(uint64_t), TRUE, NULL, NULL);
g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
*data = g_variant_builder_end(&gvb);
break;
case SR_CONF_LIMIT_SAMPLES:
g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
gvar = g_variant_new_from_data(G_VARIANT_TYPE("at"),
samplecounts, devc->samplecounts_size*sizeof(uint64_t), TRUE, NULL, NULL);
g_variant_builder_add(&gvb, "{sv}", "samplecounts", gvar);
*data = g_variant_builder_end(&gvb);
break;
case SR_CONF_TRIGGER_TYPE:
*data = g_variant_new_string(TRIGGER_TYPE);
break;
case SR_CONF_OPERATION_MODE:
*data = g_variant_new_strv(opmodes, opmodes_show_count);
break;
@@ -1300,12 +1032,16 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
*data = g_variant_new_strv(bufoptions, ARRAY_SIZE(bufoptions));
break;
case SR_CONF_CHANNEL_MODE:
if (devc->stream)
*data = g_variant_new_strv(stream_ch_modes, ARRAY_SIZE(stream_ch_modes));
else if (devc->test_mode != SR_TEST_NONE)
*data = g_variant_new_strv(buffer_ch_modes, 1);
else
*data = g_variant_new_strv(buffer_ch_modes, ARRAY_SIZE(buffer_ch_modes));
g_variant_builder_init(&gvb, G_VARIANT_TYPE("as"));
for (i = 0; i < ARRAY_SIZE(channel_modes); i++) {
if (channel_modes[i].stream == devc->stream &&
devc->profile->dev_caps.channels & (1 << i)) {
g_variant_builder_add(&gvb, "s", channel_modes[i].descr);
if (devc->test_mode != SR_TEST_NONE)
break;
}
}
*data = g_variant_builder_end(&gvb);
break;
case SR_CONF_THRESHOLD:
*data = g_variant_new_strv(thresholds, ARRAY_SIZE(thresholds));
@@ -1341,7 +1077,8 @@ static int dev_open(struct sr_dev_inst *sdi)
static int dev_close(struct sr_dev_inst *sdi)
{
int ret = dsl_dev_close(sdi);
int ret;
ret = dsl_dev_close(sdi);
return ret;
}
@@ -1364,7 +1101,7 @@ static int cleanup(void)
static void remove_sources(struct DSL_context *devc)
{
int i;
sr_err("%s: remove fds from polling", __func__);
sr_info("%s: remove fds from polling", __func__);
/* Remove fds from polling. */
for (i = 0; devc->usbfd[i] != -1; i++)
sr_source_remove(devc->usbfd[i]);
@@ -1440,7 +1177,10 @@ static int dev_acquisition_start(struct sr_dev_inst *sdi, void *cb_data)
devc->status = DSL_INIT;
devc->num_transfers = 0;
devc->submitted_transfers = 0;
devc->actual_samples = devc->limit_samples;
if (sdi->mode != LOGIC)
devc->actual_samples = (devc->limit_samples + 1023) & ~1023;
else
devc->actual_samples = devc->limit_samples;
devc->actual_bytes = devc->actual_samples / DSLOGIC_ATOMIC_SAMPLES * dsl_en_ch_num(sdi) * DSLOGIC_ATOMIC_SIZE;
devc->abort = FALSE;
devc->mstatus_valid = FALSE;

594
libsigrok4DSL/hardware/demo/demo.c
View File

@@ -20,122 +20,13 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "libsigrok.h"
#include "libsigrok-internal.h"
#include <stdlib.h>
#include <unistd.h>
#include <string.h>
#include <math.h>
#ifdef _WIN32
#include <io.h>
#include <fcntl.h>
#define pipe(fds) _pipe(fds, 4096, _O_BINARY)
#endif
/* Message logging helpers with subsystem-specific prefix string. */
#define LOG_PREFIX "demo: "
#define sr_log(l, s, args...) sr_log(l, LOG_PREFIX s, ## args)
#define sr_spew(s, args...) sr_spew(LOG_PREFIX s, ## args)
#define sr_dbg(s, args...) sr_dbg(LOG_PREFIX s, ## args)
#define sr_info(s, args...) sr_info(LOG_PREFIX s, ## args)
#define sr_warn(s, args...) sr_warn(LOG_PREFIX s, ## args)
#define sr_err(s, args...) sr_err(LOG_PREFIX s, ## args)
/* TODO: Number of probes should be configurable. */
#define NUM_PROBES 16
#define DEMONAME "Demo device"
#include "demo.h"
/* The size of chunks to send through the session bus. */
/* TODO: Should be configurable. */
#define BUFSIZE 512*1024
#define DSO_BUFSIZE 10*1024
#define PERIOD 4000
#define PI 3.14159265
#define CONST_LEN 50
#define DEMO_MAX_LOGIC_DEPTH SR_MB(100)
#define DEMO_MAX_LOGIC_SAMPLERATE SR_MHZ(400)
#define DEMO_MAX_DSO_DEPTH SR_KB(20)
#define DEMO_MAX_DSO_SAMPLERATE SR_MHZ(200)
#define DEMO_MAX_DSO_PROBES_NUM 2
/* Supported patterns which we can generate */
enum {
PATTERN_SINE = 0,
PATTERN_SQUARE = 1,
PATTERN_TRIANGLE = 2,
PATTERN_SAWTOOTH = 3,
PATTERN_RANDOM = 4,
};
static const char *pattern_strings[] = {
"Sine",
"Square",
"Triangle",
"Sawtooth",
"Random",
};
static const char *maxHeights[] = {
"1X",
"2X",
"3X",
"4X",
"5X",
};
static struct sr_dev_mode mode_list[] = {
{"LA", LOGIC},
{"DAQ", ANALOG},
{"OSC", DSO},
};
/* Private, per-device-instance driver context. */
struct dev_context {
struct sr_dev_inst *sdi;
int pipe_fds[2];
GIOChannel *channel;
uint64_t cur_samplerate;
uint64_t limit_samples;
uint64_t limit_samples_show;
uint64_t limit_msec;
uint8_t sample_generator;
uint64_t samples_counter;
void *cb_data;
int64_t starttime;
int stop;
uint64_t timebase;
gboolean instant;
gboolean data_lock;
uint8_t max_height;
uint8_t unit_bits;
uint64_t samples_not_sent;
uint16_t *buf;
uint64_t pre_index;
struct sr_status mstatus;
int trigger_stage;
uint16_t trigger_mask;
uint16_t trigger_value;
uint16_t trigger_edge;
uint8_t trigger_slope;
uint8_t trigger_source;
};
static const int hwcaps[] = {
SR_CONF_LOGIC_ANALYZER,
SR_CONF_DEMO_DEV,
SR_CONF_SAMPLERATE,
SR_CONF_PATTERN_MODE,
SR_CONF_LIMIT_SAMPLES,
SR_CONF_LIMIT_MSEC,
SR_CONF_CONTINUOUS,
};
static const int hwoptions[] = {
SR_CONF_PATTERN_MODE,
SR_CONF_MAX_HEIGHT,
@@ -168,175 +59,6 @@ static const uint8_t probeCoupling[] = {
SR_AC_COUPLING,
};
static const uint64_t probeVdivs[] = {
SR_mV(10),
SR_mV(20),
SR_mV(50),
SR_mV(100),
SR_mV(200),
SR_mV(500),
SR_V(1),
SR_V(2),
};
static const char *probeMapUnits[] = {
"V",
"A",
"°C",
"°F",
"g",
"m",
"m/s",
};
static const int const_dc = 1.95 / 10 * 255;
static const int sinx[] = {
0, 2, 3, 5, 6, 8, 9, 11, 12, 14, 16, 17, 18, 20, 21, 23, 24, 26, 27, 28,
30, 31, 32, 33, 34, 35, 37, 38, 39, 40, 41, 41, 42, 43, 44, 45, 45, 46, 47, 47,
48, 48, 49, 49, 49, 49, 50, 50, 50, 50, 50, 50, 50, 50, 50, 49, 49, 49, 48, 48,
47, 47, 46, 46, 45, 44, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, 33, 31, 30,
29, 28, 26, 25, 24, 22, 21, 19, 18, 16, 15, 13, 12, 10, 9, 7, 6, 4, 2, 1,
-1, -2, -4, -6, -7, -9, -10, -12, -13, -15, -16, -18, -19, -21, -22, -24, -25, -26, -28, -29,
-30, -31, -33, -34, -35, -36, -37, -38, -39, -40, -41, -42, -43, -44, -44, -45, -46, -46, -47, -47,
-48, -48, -49, -49, -49, -50, -50, -50, -50, -50, -50, -50, -50, -50, -49, -49, -49, -49, -48, -48,
-47, -47, -46, -45, -45, -44, -43, -42, -41, -41, -40, -39, -38, -37, -35, -34, -33, -32, -31, -30,
-28, -27, -26, -24, -23, -21, -20, -18, -17, -16, -14, -12, -11, -9, -8, -6, -5, -3, -2, 0,
};
static const int sqrx[] = {
50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50,
50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50,
50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50,
50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50,
50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50,
-50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50,
-50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50,
-50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50,
-50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50,
-50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50,
};
static const int trix[] = {
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39,
40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 49, 48, 47, 46, 45, 44, 43, 42, 41,
40, 39, 38, 37, 36, 35, 34, 33, 32, 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21,
20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1,
0, -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15, -16, -17, -18, -19,
-20, -21, -22, -23, -24, -25, -26, -27, -28, -29, -30, -31, -32, -33, -34, -35, -36, -37, -38, -39,
-40, -41, -42, -43, -44, -45, -46, -47, -48, -49, -50, -49, -48, -47, -46, -45, -44, -43, -42, -41,
-40, -39, -38, -37, -36, -35, -34, -33, -32, -31, -30, -29, -28, -27, -26, -25, -24, -23, -22, -21,
-20, -19, -18, -17, -16, -15, -14, -13, -12, -11, -10, -9, -8, -7, -6, -5, -4, -3, -2, -1,
};
static const int sawx[] = {
0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9,
10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 19, 19,
20, 20, 21, 21, 22, 22, 23, 23, 24, 24, 25, 25, 26, 26, 27, 27, 28, 28, 29, 29,
30, 30, 31, 31, 32, 32, 33, 33, 34, 34, 35, 35, 36, 36, 37, 37, 38, 38, 39, 39,
40, 40, 41, 41, 42, 42, 43, 43, 44, 44, 45, 45, 46, 46, 47, 47, 48, 48, 49, 50,
-50, -49, -48, -48, -47, -47, -46, -46, -45, -45, -44, -44, -43, -43, -42, -42, -41, -41, -40, -40,
-39, -39, -38, -38, -37, -37, -36, -36, -35, -35, -34, -34, -33, -33, -32, -32, -31, -31, -30, -30,
-29, -29, -28, -28, -27, -27, -26, -26, -25, -25, -24, -24, -23, -23, -22, -22, -21, -21, -20, -20,
-19, -19, -18, -18, -17, -17, -16, -16, -15, -15, -14, -14, -13, -13, -12, -12, -11, -11, -10, -10,
-9, -9, -8, -8, -7, -7, -6, -6, -5, -5, -4, -4, -3, -3, -2, -2, -1, -1, 0, 0,
};
static const int ranx[] = {
-4, 47, -49, -1, -3, 6, -29, 26, 1, 14, -39, -38, 36, 17, 26, -37, -2, 27, -20, -15,
-49, -46, 36, 16, 29, 23, -30, -3, 28, -2, -6, 46, 43, 50, -42, 30, 48, -50, -38, -30,
7, -36, -20, -24, -10, -34, -24, 3, -48, 46, -11, 22, 19, 28, 39, -49, -31, 34, 2, -29,
9, 35, 8, 10, 38, 30, 17, 48, -3, -6, -28, 46, -19, 18, -43, -9, -31, -32, -41, 16,
-10, 46, -4, 4, -32, -43, -45, -39, -33, 28, 24, -17, -43, 42, -7, 36, -44, -5, 9, 39,
17, -40, 12, 16, -42, -1, 2, -9, 50, -8, 27, 27, 14, 8, -18, 12, -8, 26, -8, 12,
-35, 49, 35, 2, -26, -24, -31, 33, 15, -47, 34, 46, -1, -12, 14, 32, -25, -31, -35, -18,
-48, -21, -5, 1, -27, -14, 12, 49, -11, 33, 31, 35, -36, 19, 20, 44, 29, -48, 14, -43,
1, 30, -12, 44, 20, 49, 29, -43, 42, 30, -34, 24, 20, -40, 33, -12, 13, -45, 45, -24,
-41, 36, -8, 46, 47, -34, 28, -39, 7, -32, 38, -27, 28, -3, -8, 43, -37, -24, 6, 3,
};
static const uint64_t samplerates[] = {
SR_HZ(100),
SR_HZ(200),
SR_HZ(500),
SR_KHZ(1),
SR_KHZ(2),
SR_KHZ(5),
SR_KHZ(10),
SR_KHZ(20),
SR_KHZ(50),
SR_KHZ(100),
SR_KHZ(200),
SR_KHZ(500),
SR_MHZ(1),
SR_MHZ(2),
SR_MHZ(5),
SR_MHZ(10),
SR_MHZ(20),
SR_MHZ(50),
SR_MHZ(100),
SR_MHZ(200),
};
//static const uint64_t samplecounts[] = {
// SR_KB(1),
// SR_KB(2),
// SR_KB(4),
// SR_KB(8),
// SR_KB(16),
// SR_KB(32),
// SR_KB(64),
// SR_KB(128),
// SR_KB(256),
// SR_KB(512),
// SR_MB(1),
// SR_MB(2),
// SR_MB(4),
// SR_MB(8),
// SR_MB(16),
// SR_MB(32),
// SR_MB(64),
// SR_MB(128),
//};
static const uint64_t samplecounts[] = {
SR_KB(1),
SR_KB(2),
SR_KB(5),
SR_KB(10),
SR_KB(20),
SR_KB(50),
SR_KB(100),
SR_KB(200),
SR_KB(500),
SR_MB(1),
SR_MB(2),
SR_MB(5),
SR_MB(10),
SR_MB(20),
SR_MB(50),
SR_MB(100),
};
/* We name the probes 0-7 on our demo driver. */
static const char *probe_names[NUM_PROBES + 1] = {
"0", "1", "2", "3",
"4", "5", "6", "7",
"8", "9", "10", "11",
"12", "13", "14", "15",
NULL,
};
static const gboolean default_ms_en[] = {
FALSE, /* DSO_MS_BEGIN */
TRUE, /* DSO_MS_FREQ */
FALSE, /* DSO_MS_PERD */
TRUE, /* DSO_MS_VMAX */
TRUE, /* DSO_MS_VMIN */
FALSE, /* DSO_MS_VRMS */
FALSE, /* DSO_MS_VMEA */
FALSE, /* DSO_MS_VP2P */
};
/* Private, per-device-instance driver context. */
/* TODO: struct context as with the other drivers. */
@@ -361,6 +83,27 @@ static int hw_init(struct sr_context *sr_ctx)
return std_hw_init(sr_ctx, di, LOG_PREFIX);
}
static void adjust_samplerate(struct demo_context *devc)
{
devc->samplerates_max_index = ARRAY_SIZE(samplerates) - 1;
while (samplerates[devc->samplerates_max_index] >
channel_modes[devc->ch_mode].max_samplerate)
devc->samplerates_max_index--;
devc->samplerates_min_index = 0;
while (samplerates[devc->samplerates_min_index] <
channel_modes[devc->ch_mode].min_samplerate)
devc->samplerates_min_index++;
assert(devc->samplerates_max_index >= devc->samplerates_min_index);
if (devc->cur_samplerate > samplerates[devc->samplerates_max_index])
devc->cur_samplerate = samplerates[devc->samplerates_max_index];
if (devc->cur_samplerate < samplerates[devc->samplerates_min_index])
devc->cur_samplerate = samplerates[devc->samplerates_min_index];
}
static void probe_init(struct sr_dev_inst *sdi)
{
int i;
@@ -385,10 +128,10 @@ static int setup_probes(struct sr_dev_inst *sdi, int num_probes)
{
uint16_t j;
struct sr_channel *probe;
struct demo_context *devc = sdi->priv;
for (j = 0; j < num_probes; j++) {
if (!(probe = sr_channel_new(j, (sdi->mode == LOGIC) ? SR_CHANNEL_LOGIC :
((sdi->mode == DSO) ? SR_CHANNEL_DSO : SR_CHANNEL_ANALOG),
if (!(probe = sr_channel_new(j, channel_modes[devc->ch_mode].type,
TRUE, probe_names[j])))
return SR_ERR;
sdi->channels = g_slist_append(sdi->channels, probe);
@@ -400,68 +143,45 @@ static int setup_probes(struct sr_dev_inst *sdi, int num_probes)
static GSList *hw_scan(GSList *options)
{
struct sr_dev_inst *sdi;
struct sr_channel *probe;
struct drv_context *drvc;
struct dev_context *devc;
struct demo_context *devc;
GSList *devices;
uint16_t i;
(void)options;
drvc = di->priv;
devices = NULL;
sdi = sr_dev_inst_new(LOGIC, 0, SR_ST_INITIALIZING, DEMONAME, NULL, NULL);
if (!(devc = g_try_malloc(sizeof(struct demo_context)))) {
sr_err("Device context malloc failed.");
return NULL;
}
devc->profile = &supported_Demo[0];
devc->ch_mode = devc->profile->dev_caps.default_channelmode;
devc->cur_samplerate = channel_modes[devc->ch_mode].default_samplerate;
devc->limit_samples = channel_modes[devc->ch_mode].default_samplelimit;
devc->limit_samples_show = devc->limit_samples;
devc->limit_msec = 0;
devc->sample_generator = devc->profile->dev_caps.default_pattern;
devc->timebase = devc->profile->dev_caps.default_timebase;
devc->max_height = 0;
adjust_samplerate(devc);
sdi = sr_dev_inst_new(channel_modes[devc->ch_mode].mode, 0, SR_ST_INITIALIZING,
devc->profile->vendor,
devc->profile->model,
devc->profile->model_version);
if (!sdi) {
g_free(devc);
sr_err("Device instance creation failed.");
return NULL;
}
sdi->priv = devc;
sdi->driver = di;
devices = g_slist_append(devices, sdi);
drvc->instances = g_slist_append(drvc->instances, sdi);
if (!(devc = g_try_malloc(sizeof(struct dev_context)))) {
sr_err("Device context malloc failed.");
return NULL;
}
devc->sdi = sdi;
devc->cur_samplerate = SR_MHZ(1);
devc->limit_samples = SR_MB(1);
devc->limit_samples_show = devc->limit_samples;
devc->limit_msec = 0;
devc->sample_generator = PATTERN_SINE;
devc->timebase = 500;
devc->data_lock = FALSE;
devc->max_height = 0;
devc->unit_bits = 8;
sdi->priv = devc;
if (sdi->mode == LOGIC) {
for (i = 0; probe_names[i]; i++) {
if (!(probe = sr_channel_new(i, SR_CHANNEL_LOGIC, TRUE,
probe_names[i])))
return NULL;
sdi->channels = g_slist_append(sdi->channels, probe);
}
} else if (sdi->mode == DSO) {
for (i = 0; i < DS_MAX_DSO_PROBES_NUM; i++) {
if (!(probe = sr_channel_new(i, SR_CHANNEL_DSO, TRUE,
probe_names[i])))
return NULL;
sdi->channels = g_slist_append(sdi->channels, probe);
}
} else if (sdi->mode == ANALOG) {
for (i = 0; i < DS_MAX_ANALOG_PROBES_NUM; i++) {
if (!(probe = sr_channel_new(i, SR_CHANNEL_ANALOG, TRUE,
probe_names[i])))
return NULL;
sdi->channels = g_slist_append(sdi->channels, probe);
}
}
setup_probes(sdi, channel_modes[devc->ch_mode].num);
return devices;
}
@@ -471,14 +191,16 @@ static GSList *hw_dev_list(void)
return ((struct drv_context *)(di->priv))->instances;
}
static GSList *hw_dev_mode_list(const struct sr_dev_inst *sdi)
static const GSList *hw_dev_mode_list(const struct sr_dev_inst *sdi)
{
(void)sdi;
struct demo_context *devc;
GSList *l = NULL;
unsigned int i;
for(i = 0; i < ARRAY_SIZE(mode_list); i++) {
l = g_slist_append(l, &mode_list[i]);
devc = sdi->priv;
for (i = 0; i < ARRAY_SIZE(mode_list); i++) {
if (devc->profile->dev_caps.mode_caps & (1 << i))
l = g_slist_append(l, &mode_list[i]);
}
return l;
@@ -487,7 +209,7 @@ static GSList *hw_dev_mode_list(const struct sr_dev_inst *sdi)
static int hw_dev_open(struct sr_dev_inst *sdi)
{
//(void)sdi;
struct dev_context *const devc = sdi->priv;
struct demo_context *const devc = sdi->priv;
sdi->status = SR_ST_ACTIVE;
@@ -509,7 +231,7 @@ static int hw_dev_open(struct sr_dev_inst *sdi)
static int hw_dev_close(struct sr_dev_inst *sdi)
{
//(void)sdi;
struct dev_context *const devc = sdi->priv;
struct demo_context *const devc = sdi->priv;
if (sdi->status == SR_ST_ACTIVE && devc->channel) {
g_io_channel_shutdown(devc->channel, FALSE, NULL);
@@ -566,7 +288,7 @@ static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
{
(void) cg;
struct dev_context *const devc = sdi->priv;
struct demo_context *const devc = sdi->priv;
switch (id) {
case SR_CONF_SAMPLERATE:
@@ -608,6 +330,11 @@ static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
case SR_CONF_TIMEBASE:
*data = g_variant_new_uint64(devc->timebase);
break;
case SR_CONF_MAX_TIMEBASE:
if (!sdi)
return SR_ERR;
*data = g_variant_new_uint64(MAX_TIMEBASE);
break;
case SR_CONF_PROBE_COUPLING:
*data = g_variant_new_byte(ch->coupling);
break;
@@ -617,20 +344,17 @@ static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
case SR_CONF_PROBE_EN:
*data = g_variant_new_boolean(ch->enabled);
break;
case SR_CONF_DATALOCK:
*data = g_variant_new_boolean(devc->data_lock);
break;
case SR_CONF_MAX_DSO_SAMPLERATE:
*data = g_variant_new_uint64(DEMO_MAX_DSO_SAMPLERATE);
*data = g_variant_new_uint64(channel_modes[devc->ch_mode].max_samplerate);
break;
case SR_CONF_MAX_DSO_SAMPLELIMITS:
*data = g_variant_new_uint64(DEMO_MAX_DSO_DEPTH);
*data = g_variant_new_uint64(devc->profile->dev_caps.dso_depth);
break;
case SR_CONF_HW_DEPTH:
*data = g_variant_new_uint64(DEMO_MAX_LOGIC_DEPTH);
*data = g_variant_new_uint64(devc->profile->dev_caps.hw_depth / channel_modes[devc->ch_mode].unit_bits);
break;
case SR_CONF_UNIT_BITS:
*data = g_variant_new_byte(devc->unit_bits);
*data = g_variant_new_byte(channel_modes[devc->ch_mode].unit_bits);
break;
case SR_CONF_PROBE_MAP_UNIT:
if (!sdi || !ch)
@@ -648,7 +372,12 @@ static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
*data = g_variant_new_double(ch->map_max);
break;
case SR_CONF_VLD_CH_NUM:
*data = g_variant_new_int16(NUM_PROBES);
*data = g_variant_new_int16(channel_modes[devc->ch_mode].num);
break;
case SR_CONF_HAVE_ZERO:
if (!sdi)
return SR_ERR;
*data = g_variant_new_boolean(devc->profile->dev_caps.feature_caps & CAPS_FEATURE_ZERO);
break;
default:
return SR_ERR_NA;
@@ -668,7 +397,7 @@ static int config_set(int id, GVariant *data, struct sr_dev_inst *sdi,
(void) cg;
struct dev_context *const devc = sdi->priv;
struct demo_context *const devc = sdi->priv;
if (sdi->status != SR_ST_ACTIVE)
return SR_ERR_DEV_CLOSED;
@@ -701,26 +430,21 @@ static int config_set(int id, GVariant *data, struct sr_dev_inst *sdi,
} else if (id == SR_CONF_DEVICE_MODE) {
sdi->mode = g_variant_get_int16(data);
ret = SR_OK;
if (sdi->mode == LOGIC) {
num_probes = ARRAY_SIZE(probe_names) - 1;
devc->cur_samplerate = SR_MHZ(1);
devc->limit_samples = SR_MB(1);
devc->limit_samples_show = devc->limit_samples;
} else if (sdi->mode == DSO) {
num_probes = DEMO_MAX_DSO_PROBES_NUM;
devc->cur_samplerate = DEMO_MAX_DSO_SAMPLERATE / DEMO_MAX_DSO_PROBES_NUM;
devc->limit_samples = DEMO_MAX_DSO_DEPTH / DEMO_MAX_DSO_PROBES_NUM;
devc->limit_samples_show = devc->limit_samples;
} else if (sdi->mode == ANALOG) {
num_probes = DS_MAX_ANALOG_PROBES_NUM;
devc->cur_samplerate = SR_KHZ(1);
devc->limit_samples = SR_KB(2);
devc->limit_samples_show = devc->limit_samples;
} else {
num_probes = 0;
for (i = 0; i < ARRAY_SIZE(channel_modes); i++) {
if ((int)channel_modes[i].mode == sdi->mode &&
devc->profile->dev_caps.channels & (1 << i)) {
devc->ch_mode = channel_modes[i].id;
break;
}
}
num_probes = channel_modes[devc->ch_mode].num;
devc->cur_samplerate = channel_modes[devc->ch_mode].default_samplerate;
devc->limit_samples = channel_modes[devc->ch_mode].default_samplelimit;
devc->limit_samples_show = devc->limit_samples;
devc->timebase = devc->profile->dev_caps.default_timebase;
sr_dev_probes_free(sdi);
setup_probes(sdi, num_probes);
adjust_samplerate(devc);
sr_dbg("%s: setting mode to %d", __func__, sdi->mode);
}else if (id == SR_CONF_PATTERN_MODE) {
stropt = g_variant_get_string(data, NULL);
@@ -765,16 +489,11 @@ static int config_set(int id, GVariant *data, struct sr_dev_inst *sdi,
} else if (id == SR_CONF_PROBE_EN) {
ch->enabled = g_variant_get_boolean(data);
if (en_ch_num(sdi) != 0) {
devc->limit_samples_show = DEMO_MAX_DSO_DEPTH / en_ch_num(sdi);
devc->limit_samples_show = devc->profile->dev_caps.dso_depth / en_ch_num(sdi);
}
sr_dbg("%s: setting ENABLE of channel %d to %d", __func__,
ch->index, ch->enabled);
ret = SR_OK;
} else if (id == SR_CONF_DATALOCK) {
devc->data_lock = g_variant_get_boolean(data);
sr_dbg("%s: setting data lock to %d", __func__,
devc->data_lock);
ret = SR_OK;
} else if (id == SR_CONF_PROBE_VDIV) {
tmp_u64 = g_variant_get_uint64(data);
ch->vpos = (tmp_u64 * 1.0 / ch->vdiv) * ch->vpos;
@@ -819,10 +538,13 @@ static int config_set(int id, GVariant *data, struct sr_dev_inst *sdi,
ret = SR_OK;
} else if (id == SR_CONF_PROBE_MAP_UNIT) {
ch->map_unit = g_variant_get_string(data, NULL);
ret = SR_OK;
} else if (id == SR_CONF_PROBE_MAP_MIN) {
ch->map_min = g_variant_get_double(data);
ret = SR_OK;
} else if (id == SR_CONF_PROBE_MAP_MAX) {
ch->map_max = g_variant_get_double(data);
ret = SR_OK;
} else {
ret = SR_ERR_NA;
}
@@ -833,21 +555,17 @@ static int config_set(int id, GVariant *data, struct sr_dev_inst *sdi,
static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
const struct sr_channel_group *cg)
{
struct demo_context *devc;
GVariant *gvar;
GVariantBuilder gvb;
int i;
(void)sdi;
(void)cg;
devc = sdi->priv;
switch (key) {
case SR_CONF_DEVICE_OPTIONS:
// *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
// hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
*data = g_variant_new_from_data(G_VARIANT_TYPE("ai"),
hwcaps, ARRAY_SIZE(hwcaps)*sizeof(int32_t), TRUE, NULL, NULL);
break;
case SR_CONF_DEVICE_CONFIGS:
// *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
// hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
*data = g_variant_new_from_data(G_VARIANT_TYPE("ai"),
hwoptions, ARRAY_SIZE(hwoptions)*sizeof(int32_t), TRUE, NULL, NULL);
@@ -858,27 +576,12 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
break;
case SR_CONF_SAMPLERATE:
g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
// gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
// ARRAY_SIZE(samplerates), sizeof(uint64_t));
if (sdi->mode == ANALOG)
gvar = g_variant_new_from_data(G_VARIANT_TYPE("at"),
samplerates, 16*sizeof(uint64_t), TRUE, NULL, NULL);
else if (sdi->mode == LOGIC)
gvar = g_variant_new_from_data(G_VARIANT_TYPE("at"),
samplerates, 19*sizeof(uint64_t), TRUE, NULL, NULL);
else
gvar = g_variant_new_from_data(G_VARIANT_TYPE("at"),
samplerates, ARRAY_SIZE(samplerates)*sizeof(uint64_t), TRUE, NULL, NULL);
gvar = g_variant_new_from_data(G_VARIANT_TYPE("at"),
samplerates + devc->samplerates_min_index,
(devc->samplerates_max_index - devc->samplerates_min_index + 1) * sizeof(uint64_t), TRUE, NULL, NULL);
g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
*data = g_variant_builder_end(&gvb);
break;
case SR_CONF_LIMIT_SAMPLES:
g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
gvar = g_variant_new_from_data(G_VARIANT_TYPE("at"),
samplecounts, ARRAY_SIZE(samplecounts)*sizeof(uint64_t), TRUE, NULL, NULL);
g_variant_builder_add(&gvb, "{sv}", "samplecounts", gvar);
*data = g_variant_builder_end(&gvb);
break;
case SR_CONF_PATTERN_MODE:
*data = g_variant_new_strv(pattern_strings, ARRAY_SIZE(pattern_strings));
break;
@@ -896,8 +599,9 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
break;
case SR_CONF_PROBE_VDIV:
g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
for (i = 0; devc->profile->dev_caps.vdivs[i]; i++);
gvar = g_variant_new_from_data(G_VARIANT_TYPE("at"),
probeVdivs, ARRAY_SIZE(probeVdivs)*sizeof(uint64_t), TRUE, NULL, NULL);
devc->profile->dev_caps.vdivs, i*sizeof(uint64_t), TRUE, NULL, NULL);
g_variant_builder_add(&gvb, "{sv}", "vdivs", gvar);
*data = g_variant_builder_end(&gvb);
break;
@@ -920,18 +624,19 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
static void samples_generator(uint16_t *buf, uint64_t size,
const struct sr_dev_inst *sdi,
struct dev_context *devc)
struct demo_context *devc)
{
uint64_t i, pre0_i, pre1_i;
GSList *l;
struct sr_channel *probe;
int offset;
unsigned int start_rand;
const uint64_t span = DEMO_MAX_DSO_SAMPLERATE / devc->cur_samplerate;
double span = 1;
const uint64_t len = ARRAY_SIZE(sinx) - 1;
const int *pre_buf;
uint16_t tmp_u16 = 0;
unsigned int ch_num = en_ch_num(sdi) ? en_ch_num(sdi) : 1;
uint64_t index = 0;
switch (devc->sample_generator) {
case PATTERN_SINE: /* Sine */
@@ -954,10 +659,10 @@ static void samples_generator(uint16_t *buf, uint64_t size,
break;
}
if (devc->samples_counter == devc->limit_samples &&
if (sdi->mode == DSO && devc->samples_counter == devc->limit_samples &&
size != devc->limit_samples) {
// for (i = 0; i < devc->limit_samples; i++)
// *(buf + i) = *(buf + ((i + size)%devc->limit_samples));
for (i = 0; i < devc->limit_samples; i++)
*(buf + i) = *(buf + ((i + size)%devc->limit_samples));
} else if (sdi->mode == LOGIC) {
for (i = 0; i < size; i++) {
//index = (i/10/g_slist_length(sdi->channels)+start_rand)%len;
@@ -974,17 +679,25 @@ static void samples_generator(uint16_t *buf, uint64_t size,
*(buf + i) = *(buf + i - 1);
}
}
} else if (sdi->mode == ANALOG) {
for (i = 0; i < size; i++) {
*(buf + i) = 0x8080;
if (i % (int)ceil(size / 7.0))
*(buf + i) = 0x7E7E + (rand() & 0x0300) + (rand() & 0x003);
else if (rand() > INT_MAX / 4)
*(buf + i) = 0x7878 + (rand() & 0x0F00) + (rand() & 0x00F);
else if (rand() < INT_MAX / 8)
*(buf + i) = 0x6060 + (rand() & 0x3F00) + (rand() & 0x03F);
}
// } else if (sdi->mode == ANALOG) {
// for (i = 0; i < size; i++) {
// *(buf + i) = 0x8080;
// if (i % (int)ceil(size / 7.0))
// *(buf + i) = 0x7E7E + (rand() & 0x0300) + (rand() & 0x003);
// else if (rand() > INT_MAX / 4)
// *(buf + i) = 0x7878 + (rand() & 0x0F00) + (rand() & 0x00F);
// else if (rand() < INT_MAX / 8)
// *(buf + i) = 0x6060 + (rand() & 0x3F00) + (rand() & 0x03F);
// }
} else {
if (sdi->mode == DSO) {
index = devc->pre_index;
span = channel_modes[devc->ch_mode].max_samplerate / devc->cur_samplerate;
} else if (sdi->mode == ANALOG) {
span = len * 20.0 / devc->limit_samples;
index = 0;
}
if (devc->pre_index == 0) {
devc->mstatus.ch0_max = 0;
devc->mstatus.ch0_min = 255;
@@ -995,19 +708,27 @@ static void samples_generator(uint16_t *buf, uint64_t size,
devc->mstatus.ch1_period = 0;
devc->mstatus.ch1_pcnt = 1;
}
memset(buf+devc->pre_index, 0, size*sizeof(uint16_t));
if (sdi->mode == DSO)
memset(buf+devc->pre_index, 0, size*sizeof(uint16_t));
else if (sdi->mode == ANALOG)
memset(buf, 0, size*sizeof(uint16_t));
for (l = sdi->channels; l; l = l->next) {
start_rand = devc->pre_index == 0 ? rand()%len : 0;
if (sdi->mode == DSO)
start_rand = (devc->pre_index == 0) ? rand()%len : 0;
else
start_rand = devc->pre_index * span;
probe = (struct sr_channel *)l->data;
offset = ceil((0.5 - (probe->vpos/probe->vdiv/10.0)) * 255);
//offset = 128;
pre0_i = devc->pre_index;
pre1_i = devc->pre_index;
for (i = devc->pre_index; i < devc->pre_index + size; i++) {
for (i = index; i < index + size; i++) {
if (probe->coupling == SR_DC_COUPLING) {
*(buf + i) += (uint8_t)(offset + (1000.0/probe->vdiv) * (pre_buf[(i*span+start_rand)%len] - const_dc)) << (probe->index * 8);
*(buf + i) += (uint8_t)(offset + (1000.0/probe->vdiv) * (pre_buf[(uint64_t)(i*span+start_rand)%len] - const_dc)) << (probe->index * 8);
} else if (probe->coupling == SR_AC_COUPLING) {
*(buf + i) += (uint8_t)(offset + (1000.0/probe->vdiv) * pre_buf[(i*span+start_rand)%len]) << (probe->index * 8);
*(buf + i) += (uint8_t)(offset + (1000.0/probe->vdiv) * pre_buf[(uint64_t)(i*span+start_rand)%len]) << (probe->index * 8);
} else {
*(buf + i) += offset << (probe->index * 8);
}
@@ -1016,18 +737,18 @@ static void samples_generator(uint16_t *buf, uint64_t size,
devc->mstatus.ch0_max = MAX(devc->mstatus.ch0_max, (*(buf + i) & 0x00ff));
devc->mstatus.ch0_min = MIN(devc->mstatus.ch0_min, (*(buf + i) & 0x00ff));
if (i > devc->pre_index &&
pre_buf[(i*span+start_rand)%len] < 0 &&
pre_buf[((i-1)*span+start_rand)%len] > 0) {
devc->mstatus.ch0_period = 2*(i - pre0_i)*pow(10, 8)/DEMO_MAX_DSO_SAMPLERATE;
pre_buf[(uint64_t)(i*span+start_rand)%len] < 0 &&
pre_buf[(uint64_t)((i-1)*span+start_rand)%len] > 0) {
devc->mstatus.ch0_period = 2*(i - pre0_i)*pow(10, 8)/channel_modes[devc->ch_mode].max_samplerate;
pre0_i = i;
}
} else {
devc->mstatus.ch1_max = MAX(devc->mstatus.ch1_max, ((*(buf + i) & 0xff00) >> 8));
devc->mstatus.ch1_min = MIN(devc->mstatus.ch1_min, ((*(buf + i) & 0xff00) >> 8));
if (i > devc->pre_index &&
pre_buf[(i*span+start_rand)%len] < 0 &&
pre_buf[((i-1)*span+start_rand)%len] > 0) {
devc->mstatus.ch1_period = 2*(i - pre1_i)*pow(10, 8)/DEMO_MAX_DSO_SAMPLERATE;
pre_buf[(uint64_t)(i*span+start_rand)%len] < 0 &&
pre_buf[(uint64_t)((i-1)*span+start_rand)%len] > 0) {
devc->mstatus.ch1_period = 2*(i - pre1_i)*pow(10, 8)/channel_modes[devc->ch_mode].max_samplerate;
pre1_i = i;
}
}
@@ -1050,7 +771,7 @@ static void samples_generator(uint16_t *buf, uint64_t size,
/* Callback handling data */
static int receive_data(int fd, int revents, const struct sr_dev_inst *sdi)
{
struct dev_context *devc = sdi->priv;
struct demo_context *devc = sdi->priv;
struct sr_datafeed_packet packet;
struct sr_datafeed_logic logic;
struct sr_datafeed_dso dso;
@@ -1145,7 +866,7 @@ static int receive_data(int fd, int revents, const struct sr_dev_inst *sdi)
if (sdi->mode == LOGIC) {
packet.type = SR_DF_LOGIC;
packet.payload = &logic;
logic.length = sending_now * (NUM_PROBES >> 3);
logic.length = sending_now * (channel_modes[devc->ch_mode].num >> 3);
logic.format = LA_CROSS_DATA;
logic.data = devc->buf;
} else if (sdi->mode == DSO) {
@@ -1167,7 +888,7 @@ static int receive_data(int fd, int revents, const struct sr_dev_inst *sdi)
packet.payload = &analog;
analog.probes = sdi->channels;
analog.num_samples = sending_now;
analog.unit_bits = 8;
analog.unit_bits = channel_modes[devc->ch_mode].unit_bits;;
analog.mq = SR_MQ_VOLTAGE;
analog.unit = SR_UNIT_VOLT;
analog.mqflags = SR_MQFLAG_AC;
@@ -1178,6 +899,8 @@ static int receive_data(int fd, int revents, const struct sr_dev_inst *sdi)
devc->pre_index += sending_now;
if (devc->pre_index >= devc->limit_samples)
devc->pre_index = 0;
} else if (sdi->mode == ANALOG) {
devc->pre_index =(devc->pre_index + sending_now) % devc->limit_samples;
}
sr_session_send(sdi, &packet);
@@ -1203,7 +926,7 @@ static int receive_data(int fd, int revents, const struct sr_dev_inst *sdi)
static int hw_dev_acquisition_start(struct sr_dev_inst *sdi,
void *cb_data)
{
struct dev_context *const devc = sdi->priv;
struct demo_context *const devc = sdi->priv;
(void)cb_data;
@@ -1223,17 +946,18 @@ static int hw_dev_acquisition_start(struct sr_dev_inst *sdi,
/*
* trigger setting
*/
if (!trigger->trigger_en || sdi->mode != LOGIC) {
devc->trigger_stage = 0;
} else {
devc->trigger_mask = ds_trigger_get_mask0(TriggerStages);
devc->trigger_value = ds_trigger_get_value0(TriggerStages);
devc->trigger_edge = ds_trigger_get_edge0(TriggerStages);
if (devc->trigger_edge != 0)
devc->trigger_stage = 2;
else
devc->trigger_stage = 1;
}
// if (!trigger->trigger_en || sdi->mode != LOGIC) {
// devc->trigger_stage = 0;
// } else {
// devc->trigger_mask = ds_trigger_get_mask0(TriggerStages);
// devc->trigger_value = ds_trigger_get_value0(TriggerStages);
// devc->trigger_edge = ds_trigger_get_edge0(TriggerStages);
// if (devc->trigger_edge != 0)
// devc->trigger_stage = 2;
// else
// devc->trigger_stage = 1;
// }
devc->trigger_stage = 0;
/*
* Setting two channels connected by a pipe is a remnant from when the
@@ -1265,7 +989,7 @@ static int hw_dev_acquisition_stop(const struct sr_dev_inst *sdi, void *cb_data)
{
(void)cb_data;
struct dev_context *const devc = sdi->priv;
struct demo_context *const devc = sdi->priv;
struct sr_datafeed_packet packet;
if (devc->stop)
return SR_OK;
@@ -1292,7 +1016,7 @@ static int hw_dev_status_get(const struct sr_dev_inst *sdi, struct sr_status *st
(void)begin;
(void)end;
if (sdi) {
struct dev_context *const devc = sdi->priv;
struct demo_context *const devc = sdi->priv;
*status = devc->mstatus;
return SR_OK;
} else {

360
libsigrok4DSL/hardware/demo/demo.h Normal file
View File

@@ -0,0 +1,360 @@
/*
* This file is part of the libsigrok project.
*
* Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
* Copyright (C) 2013 DreamSourceLab <support@dreamsourcelab.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef LIBDSL_HARDWARE_DEMO_H
#define LIBDSL_HARDWARE_DEMO_H
#include <glib.h>
#include "libsigrok.h"
#include "libsigrok-internal.h"
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <math.h>
#include <errno.h>
#include <assert.h>
#include <sys/stat.h>
#include <inttypes.h>
#include <unistd.h>
#ifdef _WIN32
#include <io.h>
#include <fcntl.h>
#define pipe(fds) _pipe(fds, 4096, _O_BINARY)
#endif
#undef min
#define min(a,b) ((a)<(b)?(a):(b))
#undef max
#define max(a,b) ((a)>(b)?(a):(b))
/* Message logging helpers with subsystem-specific prefix string. */
#define LOG_PREFIX "demo: "
#define sr_log(l, s, args...) sr_log(l, LOG_PREFIX s, ## args)
#define sr_spew(s, args...) sr_spew(LOG_PREFIX s, ## args)
#define sr_dbg(s, args...) sr_dbg(LOG_PREFIX s, ## args)
#define sr_info(s, args...) sr_info(LOG_PREFIX s, ## args)
#define sr_warn(s, args...) sr_warn(LOG_PREFIX s, ## args)
#define sr_err(s, args...) sr_err(LOG_PREFIX s, ## args)
/* hardware Capabilities */
#define CAPS_MODE_LOGIC (1 << 0)
#define CAPS_MODE_ANALOG (1 << 1)
#define CAPS_MODE_DSO (1 << 2)
#define CAPS_FEATURE_NONE 0
// zero calibration ability
#define CAPS_FEATURE_ZERO (1 << 4)
/* end */
static struct sr_dev_mode mode_list[] = {
{"LA", LOGIC},
{"DAQ", ANALOG},
{"OSC", DSO},
};
/* Supported patterns which we can generate */
enum DEMO_PATTERN {
PATTERN_SINE = 0,
PATTERN_SQUARE = 1,
PATTERN_TRIANGLE = 2,
PATTERN_SAWTOOTH = 3,
PATTERN_RANDOM = 4,
};
static const char *pattern_strings[] = {
"Sine",
"Square",
"Triangle",
"Sawtooth",
"Random",
};
struct DEMO_caps {
uint64_t mode_caps;
uint64_t feature_caps;
uint64_t channels;
uint64_t hw_depth;
uint64_t dso_depth;
uint8_t intest_channel;
const uint64_t *vdivs;
uint8_t vga_id;
uint16_t default_channelmode;
enum DEMO_PATTERN default_pattern;
uint64_t default_timebase;
};
struct DEMO_profile {
const char *vendor;
const char *model;
const char *model_version;
struct DEMO_caps dev_caps;
};
static const uint64_t vdivs10to2000[] = {
SR_mV(10),
SR_mV(20),
SR_mV(50),
SR_mV(100),
SR_mV(200),
SR_mV(500),
SR_V(1),
SR_V(2),
0,
};
enum CHANNEL_ID {
DEMO_LOGIC100x16 = 0,
DEMO_ANALOG10x2,
DEMO_DSO200x2,
};
struct DEMO_channels {
enum CHANNEL_ID id;
enum OPERATION_MODE mode;
enum CHANNEL_TYPE type;
uint16_t num;
uint8_t unit_bits;
uint64_t default_samplerate;
uint64_t default_samplelimit;
uint64_t min_samplerate;
uint64_t max_samplerate;
const char *descr;
};
static const struct DEMO_channels channel_modes[] = {
// LA Stream
{DEMO_LOGIC100x16, LOGIC, SR_CHANNEL_LOGIC, 16, 1, SR_MHZ(1), SR_Mn(1),
SR_KHZ(10), SR_MHZ(100), "Use 16 Channels (Max 20MHz)"},
// DAQ
{DEMO_ANALOG10x2, ANALOG, SR_CHANNEL_ANALOG, 2, 8, SR_MHZ(1), SR_Mn(1),
SR_HZ(10), SR_MHZ(10), "Use Channels 0~1 (Max 10MHz)"},
// OSC
{DEMO_DSO200x2, DSO, SR_CHANNEL_DSO, 2, 8, SR_MHZ(100), SR_Kn(10),
SR_HZ(100), SR_MHZ(200), "Use Channels 0~1 (Max 200MHz)"}
};
static const struct DEMO_profile supported_Demo[] = {
/*
* Demo
*/
{"DreamSourceLab", "Demo Device", NULL,
{CAPS_MODE_LOGIC | CAPS_MODE_ANALOG | CAPS_MODE_DSO,
CAPS_FEATURE_NONE,
(1 << DEMO_LOGIC100x16) |
(1 << DEMO_ANALOG10x2) |
(1 << DEMO_DSO200x2),
SR_Mn(100),
SR_Kn(20),
0,
vdivs10to2000,
0,
DEMO_LOGIC100x16,
PATTERN_SINE,
SR_NS(500)}
},
{ 0, 0, 0, {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}
};
struct demo_context {
const struct DEMO_profile *profile;
int pipe_fds[2];
GIOChannel *channel;
uint64_t cur_samplerate;
uint64_t limit_samples;
uint64_t limit_samples_show;
uint64_t limit_msec;
uint8_t sample_generator;
uint64_t samples_counter;
void *cb_data;
int64_t starttime;
int stop;
uint64_t timebase;
enum CHANNEL_ID ch_mode;
uint16_t samplerates_min_index;
uint16_t samplerates_max_index;
gboolean instant;
uint8_t max_height;
uint64_t samples_not_sent;
uint16_t *buf;
uint64_t pre_index;
struct sr_status mstatus;
int trigger_stage;
uint16_t trigger_mask;
uint16_t trigger_value;
uint16_t trigger_edge;
uint8_t trigger_slope;
uint8_t trigger_source;
};
static const uint64_t samplerates[] = {
SR_HZ(10),
SR_HZ(20),
SR_HZ(50),
SR_HZ(100),
SR_HZ(200),
SR_HZ(500),
SR_KHZ(1),
SR_KHZ(2),
SR_KHZ(5),
SR_KHZ(10),
SR_KHZ(20),
SR_KHZ(40),
SR_KHZ(50),
SR_KHZ(100),
SR_KHZ(200),
SR_KHZ(400),
SR_KHZ(500),
SR_MHZ(1),
SR_MHZ(2),
SR_MHZ(4),
SR_MHZ(5),
SR_MHZ(10),
SR_MHZ(20),
SR_MHZ(25),
SR_MHZ(40),
SR_MHZ(50),
SR_MHZ(100),
SR_MHZ(200),
SR_MHZ(400),
SR_MHZ(500),
SR_MHZ(800),
SR_GHZ(1),
SR_GHZ(2),
SR_GHZ(5),
SR_GHZ(10),
};
static const char *probeMapUnits[] = {
"V",
"A",
"°C",
"°F",
"g",
"m",
"m/s",
};
/* We name the probes 0-7 on our demo driver. */
static const char *probe_names[] = {
"0", "1", "2", "3",
"4", "5", "6", "7",
"8", "9", "10", "11",
"12", "13", "14", "15",
NULL,
};
static const gboolean default_ms_en[] = {
FALSE, /* DSO_MS_BEGIN */
TRUE, /* DSO_MS_FREQ */
FALSE, /* DSO_MS_PERD */
TRUE, /* DSO_MS_VMAX */
TRUE, /* DSO_MS_VMIN */
FALSE, /* DSO_MS_VRMS */
FALSE, /* DSO_MS_VMEA */
FALSE, /* DSO_MS_VP2P */
};
static const char *maxHeights[] = {
"1X",
"2X",
"3X",
"4X",
"5X",
};
static const int const_dc = 1.95 / 10 * 255;
static const int sinx[] = {
0, 2, 3, 5, 6, 8, 9, 11, 12, 14, 16, 17, 18, 20, 21, 23, 24, 26, 27, 28,
30, 31, 32, 33, 34, 35, 37, 38, 39, 40, 41, 41, 42, 43, 44, 45, 45, 46, 47, 47,
48, 48, 49, 49, 49, 49, 50, 50, 50, 50, 50, 50, 50, 50, 50, 49, 49, 49, 48, 48,
47, 47, 46, 46, 45, 44, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, 33, 31, 30,
29, 28, 26, 25, 24, 22, 21, 19, 18, 16, 15, 13, 12, 10, 9, 7, 6, 4, 2, 1,
-1, -2, -4, -6, -7, -9, -10, -12, -13, -15, -16, -18, -19, -21, -22, -24, -25, -26, -28, -29,
-30, -31, -33, -34, -35, -36, -37, -38, -39, -40, -41, -42, -43, -44, -44, -45, -46, -46, -47, -47,
-48, -48, -49, -49, -49, -50, -50, -50, -50, -50, -50, -50, -50, -50, -49, -49, -49, -49, -48, -48,
-47, -47, -46, -45, -45, -44, -43, -42, -41, -41, -40, -39, -38, -37, -35, -34, -33, -32, -31, -30,
-28, -27, -26, -24, -23, -21, -20, -18, -17, -16, -14, -12, -11, -9, -8, -6, -5, -3, -2, 0,
};
static const int sqrx[] = {
50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50,
50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50,
50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50,
50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50,
50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50,
-50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50,
-50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50,
-50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50,
-50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50,
-50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50, -50,
};
static const int trix[] = {
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39,
40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 49, 48, 47, 46, 45, 44, 43, 42, 41,
40, 39, 38, 37, 36, 35, 34, 33, 32, 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21,
20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1,
0, -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15, -16, -17, -18, -19,
-20, -21, -22, -23, -24, -25, -26, -27, -28, -29, -30, -31, -32, -33, -34, -35, -36, -37, -38, -39,
-40, -41, -42, -43, -44, -45, -46, -47, -48, -49, -50, -49, -48, -47, -46, -45, -44, -43, -42, -41,
-40, -39, -38, -37, -36, -35, -34, -33, -32, -31, -30, -29, -28, -27, -26, -25, -24, -23, -22, -21,
-20, -19, -18, -17, -16, -15, -14, -13, -12, -11, -10, -9, -8, -7, -6, -5, -4, -3, -2, -1,
};
static const int sawx[] = {
0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9,
10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 19, 19,
20, 20, 21, 21, 22, 22, 23, 23, 24, 24, 25, 25, 26, 26, 27, 27, 28, 28, 29, 29,
30, 30, 31, 31, 32, 32, 33, 33, 34, 34, 35, 35, 36, 36, 37, 37, 38, 38, 39, 39,
40, 40, 41, 41, 42, 42, 43, 43, 44, 44, 45, 45, 46, 46, 47, 47, 48, 48, 49, 50,
-50, -49, -48, -48, -47, -47, -46, -46, -45, -45, -44, -44, -43, -43, -42, -42, -41, -41, -40, -40,
-39, -39, -38, -38, -37, -37, -36, -36, -35, -35, -34, -34, -33, -33, -32, -32, -31, -31, -30, -30,
-29, -29, -28, -28, -27, -27, -26, -26, -25, -25, -24, -24, -23, -23, -22, -22, -21, -21, -20, -20,
-19, -19, -18, -18, -17, -17, -16, -16, -15, -15, -14, -14, -13, -13, -12, -12, -11, -11, -10, -10,
-9, -9, -8, -8, -7, -7, -6, -6, -5, -5, -4, -4, -3, -3, -2, -2, -1, -1, 0, 0,
};
static const int ranx[] = {
-4, 47, -49, -1, -3, 6, -29, 26, 1, 14, -39, -38, 36, 17, 26, -37, -2, 27, -20, -15,
-49, -46, 36, 16, 29, 23, -30, -3, 28, -2, -6, 46, 43, 50, -42, 30, 48, -50, -38, -30,
7, -36, -20, -24, -10, -34, -24, 3, -48, 46, -11, 22, 19, 28, 39, -49, -31, 34, 2, -29,
9, 35, 8, 10, 38, 30, 17, 48, -3, -6, -28, 46, -19, 18, -43, -9, -31, -32, -41, 16,
-10, 46, -4, 4, -32, -43, -45, -39, -33, 28, 24, -17, -43, 42, -7, 36, -44, -5, 9, 39,
17, -40, 12, 16, -42, -1, 2, -9, 50, -8, 27, 27, 14, 8, -18, 12, -8, 26, -8, 12,
-35, 49, 35, 2, -26, -24, -31, 33, 15, -47, 34, 46, -1, -12, 14, 32, -25, -31, -35, -18,
-48, -21, -5, 1, -27, -14, 12, 49, -11, 33, 31, 35, -36, 19, 20, 44, 29, -48, 14, -43,
1, 30, -12, 44, 20, 49, 29, -43, 42, 30, -34, 24, 20, -40, 33, -12, 13, -45, 45, -24,
-41, 36, -8, 46, 47, -34, 28, -39, 7, -32, 38, -27, 28, -3, -8, 43, -37, -24, 6, 3,
};
#endif

2
libsigrok4DSL/hwdriver.c
View File

@@ -68,8 +68,6 @@ static struct sr_config_info sr_config_info_data[] = {
"Pre-trigger capture ratio", "Pre-trigger capture ratio", NULL},
{SR_CONF_PATTERN_MODE, SR_T_CHAR, "pattern",
"Pattern mode", "Pattern mode", NULL},
{SR_CONF_TRIGGER_TYPE, SR_T_CHAR, "triggertype",
"Trigger types", "Trigger types", NULL},
{SR_CONF_RLE, SR_T_BOOL, "rle",
"Run Length Encoding", "Run Length Encoding", NULL},
{SR_CONF_WAIT_UPLOAD, SR_T_BOOL, "buf_upload",

42
libsigrok4DSL/libsigrok.h
View File

@@ -124,6 +124,10 @@ enum {
#define DS_CONF_DSO_VDIVS 10
#define DS_MAX_TRIG_PERCENT 90
/*
* Oscilloscope
*/
#define MAX_TIMEBASE SR_SEC(10)
extern char DS_RES_PATH[256];
@@ -353,10 +357,6 @@ struct sr_datafeed_logic {
void *data;
};
struct sr_datafeed_trigger {
};
struct sr_datafeed_dso {
/** The probes for which data is included in this packet. */
GSList *probes;
@@ -593,7 +593,7 @@ struct sr_output_module {
};
enum {
enum CHANNEL_TYPE {
SR_CHANNEL_LOGIC = 10000,
SR_CHANNEL_DSO,
SR_CHANNEL_ANALOG,
@@ -602,7 +602,7 @@ enum {
SR_CHANNEL_FFT,
};
enum {
enum OPERATION_MODE {
LOGIC = 0,
DSO = 1,
ANALOG = 2,
@@ -628,6 +628,7 @@ struct sr_channel {
const char *map_unit;
double map_min;
double map_max;
struct DSL_vga *vga_ptr;
};
/** Structure for groups of channels that have common properties. */
@@ -681,7 +682,7 @@ struct sr_status {
uint64_t ch1_period;
uint32_t ch1_pcnt;
int vlen;
uint32_t vlen;
gboolean stream_mode;
uint32_t sample_divider;
gboolean sample_divider_tog;
@@ -796,6 +797,7 @@ enum {
SR_CONF_BUFFERSIZE,
/** Time base. */
SR_CONF_MAX_TIMEBASE,
SR_CONF_TIMEBASE,
/** Filter. */
@@ -811,11 +813,10 @@ enum {
SR_CONF_VLD_CH_NUM,
/** Zero */
SR_CONF_HAVE_ZERO,
SR_CONF_ZERO,
SR_CONF_ZERO_SET,
SR_CONF_ZERO_LOAD,
SR_CONF_COMB_SET,
SR_CONF_ZERO,
SR_CONF_ZERO_OVER,
SR_CONF_VOCM,
SR_CONF_CALI,
@@ -835,21 +836,6 @@ enum {
SR_CONF_TEST,
SR_CONF_EEPROM,
/** Data lock */
SR_CONF_DATALOCK,
/** Trigger types. */
SR_CONF_TRIGGER_TYPE,
/** The device supports setting its sample interval, in ms. */
SR_CONF_SAMPLE_INTERVAL,
@@ -929,12 +915,8 @@ enum {
/*--- Special stuff -------------------------------------------------*/
/** Scan options supported by the driver. */
SR_CONF_SCAN_OPTIONS = 40000,
/** Device options for a particular device. */
SR_CONF_DEVICE_OPTIONS,
SR_CONF_DEVICE_CONFIGS,
/** Sessions */
SR_CONF_DEVICE_SESSIONS,
@@ -1112,7 +1094,7 @@ struct sr_dev_driver {
int (*cleanup) (void);
GSList *(*scan) (GSList *options);
GSList *(*dev_list) (void);
GSList *(*dev_mode_list) (const struct sr_dev_inst *sdi);
const GSList *(*dev_mode_list) (const struct sr_dev_inst *sdi);
int (*dev_clear) (void);
int (*config_get) (int id, GVariant **data,

4
libsigrok4DSL/log.c
View File

@@ -38,8 +38,8 @@
*/
/* Currently selected libsigrok loglevel. Default: SR_LOG_WARN. */
//static int sr_loglevel = SR_LOG_WARN; /* Show errors+warnings per default. */
static int sr_loglevel = SR_LOG_SPEW;
static int sr_loglevel = SR_LOG_WARN; /* Show errors+warnings per default. */
//static int sr_loglevel = SR_LOG_SPEW;
/* Function prototype. */
static int sr_logv(void *cb_data, int loglevel, const char *format,

5
libsigrok4DSL/proto.h
View File

@@ -51,9 +51,8 @@ SR_API int sr_dev_probe_enable(const struct sr_dev_inst *sdi, int probenum,
gboolean state);
SR_API int sr_dev_trigger_set(const struct sr_dev_inst *sdi, uint16_t probenum,
const char *trigger);
SR_API gboolean sr_dev_has_option(const struct sr_dev_inst *sdi, int key);
SR_API GSList *sr_dev_list(const struct sr_dev_driver *driver);
SR_API GSList *sr_dev_mode_list(const struct sr_dev_inst *sdi);
SR_API const GSList *sr_dev_mode_list(const struct sr_dev_inst *sdi);
SR_API int sr_dev_clear(const struct sr_dev_driver *driver);
SR_API int sr_dev_open(struct sr_dev_inst *sdi);
SR_API int sr_dev_close(struct sr_dev_inst *sdi);
@@ -135,8 +134,6 @@ SR_API char *sr_samplecount_string(uint64_t samplecount);
SR_API char *sr_period_string(uint64_t frequency);
SR_API char *sr_time_string(uint64_t time);
SR_API char *sr_voltage_string(uint64_t v_p, uint64_t v_q);
SR_API char **sr_parse_triggerstring(const struct sr_dev_inst *sdi,
const char *triggerstring);
SR_API int sr_parse_sizestring(const char *sizestring, uint64_t *size);
SR_API uint64_t sr_parse_timestring(const char *timestring);
SR_API gboolean sr_parse_boolstring(const char *boolstring);

4
libsigrok4DSL/session.c
View File

@@ -416,8 +416,8 @@ SR_API int sr_session_run(void)
}
} else {
/* Real sources, use g_poll() main loop. */
while (session->num_sources)
sr_session_iteration(TRUE);
while (session->num_sources)
sr_session_iteration(TRUE);
}
g_mutex_lock(&session->stop_mutex);

37
libsigrok4DSL/session_driver.c
View File

@@ -53,6 +53,16 @@ static const char *maxHeights[] = {
"4X",
"5X",
};
static const uint64_t vdivs[] = {
SR_mV(10),
SR_mV(20),
SR_mV(50),
SR_mV(100),
SR_mV(200),
SR_mV(500),
SR_V(1),
SR_V(2),
};
struct session_vdev {
int version;
@@ -80,9 +90,6 @@ struct session_vdev {
};
static GSList *dev_insts = NULL;
static const int hwcaps[] = {
SR_CONF_CAPTUREFILE,
};
static const int hwoptions[] = {
SR_CONF_MAX_HEIGHT,
@@ -97,8 +104,8 @@ static const int32_t probeOptions[] = {
static const char *probeMapUnits[] = {
"V",
"A",
"°C",
"°F",
"℃",
"℉",
"g",
"m",
"m/s",
@@ -376,6 +383,11 @@ static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
} else
return SR_ERR;
break;
case SR_CONF_MAX_TIMEBASE:
if (!sdi)
return SR_ERR;
*data = g_variant_new_uint64(MAX_TIMEBASE);
break;
case SR_CONF_UNIT_BITS:
if (sdi) {
vdev = sdi->priv;
@@ -628,13 +640,7 @@ static int config_list(int key, GVariant **data,
(void)sdi;
switch (key) {
case SR_CONF_DEVICE_OPTIONS:
// *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
// hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
*data = g_variant_new_from_data(G_VARIANT_TYPE("ai"),
hwcaps, ARRAY_SIZE(hwcaps)*sizeof(int32_t), TRUE, NULL, NULL);
break;
case SR_CONF_DEVICE_CONFIGS:
case SR_CONF_DEVICE_OPTIONS:
// *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
// hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
*data = g_variant_new_from_data(G_VARIANT_TYPE("ai"),
@@ -664,6 +670,13 @@ static int config_list(int key, GVariant **data,
*data = g_variant_new_from_data(G_VARIANT_TYPE("ai"),
probeOptions, ARRAY_SIZE(probeOptions)*sizeof(int32_t), TRUE, NULL, NULL);
break;
case SR_CONF_PROBE_VDIV:
g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
gvar = g_variant_new_from_data(G_VARIANT_TYPE("at"),
vdivs, ARRAY_SIZE(vdivs)*sizeof(uint64_t), TRUE, NULL, NULL);
g_variant_builder_add(&gvb, "{sv}", "vdivs", gvar);
*data = g_variant_builder_end(&gvb);
break;
case SR_CONF_PROBE_MAP_UNIT:
*data = g_variant_new_strv(probeMapUnits, ARRAY_SIZE(probeMapUnits));
break;

93
libsigrok4DSL/strutil.c
View File

@@ -299,99 +299,6 @@ SR_API char *sr_voltage_string(uint64_t v_p, uint64_t v_q)
return o;
}
/**
* Parse a trigger specification string.
*
* @param sdi The device instance for which the trigger specification is
* intended. Must not be NULL. Also, sdi->driver and
* sdi->driver->info_get must not be NULL.
* @param triggerstring The string containing the trigger specification for
* one or more probes of this device. Entries for multiple probes are
* comma-separated. Triggers are specified in the form key=value,
* where the key is a probe number (or probe name) and the value is
* the requested trigger type. Valid trigger types currently
* include 'r' (rising edge), 'f' (falling edge), 'c' (any pin value
* change), '0' (low value), or '1' (high value).
* Example: "1=r,sck=f,miso=0,7=c"
*
* @return Pointer to a list of trigger types (strings), or NULL upon errors.
* The pointer list (if non-NULL) has as many entries as the
* respective device has probes (all physically available probes,
* not just enabled ones). Entries of the list which don't have
* a trigger value set in 'triggerstring' are NULL, the other entries
* contain the respective trigger type which is requested for the
* respective probe (e.g. "r", "c", and so on).
*/
SR_API char **sr_parse_triggerstring(const struct sr_dev_inst *sdi,
const char *triggerstring)
{
GSList *l;
GVariant *gvar;
struct sr_channel *probe;
int max_probes, probenum, i;
char **tokens, **triggerlist, *trigger, *tc;
const char *trigger_types;
gboolean error;
max_probes = g_slist_length(sdi->channels);
error = FALSE;
if (!(triggerlist = g_try_malloc0(max_probes * sizeof(char *)))) {
sr_err("%s: triggerlist malloc failed", __func__);
return NULL;
}
if (sdi->driver->config_list(SR_CONF_TRIGGER_TYPE, &gvar, sdi, NULL) != SR_OK) {
sr_err("%s: Device doesn't support any triggers.", __func__);
return NULL;
}
trigger_types = g_variant_get_string(gvar, NULL);
tokens = g_strsplit(triggerstring, ",", max_probes);
for (i = 0; tokens[i]; i++) {
probenum = -1;
for (l = sdi->channels; l; l = l->next) {
probe = (struct sr_channel *)l->data;
if (probe->enabled
&& !strncmp(probe->name, tokens[i],
strlen(probe->name))) {
probenum = probe->index;
break;
}
}
if (probenum < 0 || probenum >= max_probes) {
sr_err("Invalid probe.");
error = TRUE;
break;
}
if ((trigger = strchr(tokens[i], '='))) {
for (tc = ++trigger; *tc; tc++) {
if (strchr(trigger_types, *tc) == NULL) {
sr_err("Unsupported trigger "
"type '%c'.", *tc);
error = TRUE;
break;
}
}
if (!error)
triggerlist[probenum] = g_strdup(trigger);
}
}
g_strfreev(tokens);
g_variant_unref(gvar);
if (error) {
for (i = 0; i < max_probes; i++)
g_free(triggerlist[i]);
g_free(triggerlist);
triggerlist = NULL;
}
return triggerlist;
}
/**
* Convert a "natural" string representation of a size value to uint64_t.
*