diff --git a/libsigrokdecode4DSL/decoders/0-i2c/pd.py b/libsigrokdecode4DSL/decoders/0-i2c/pd.py
index 467df605..39e444e8 100644
--- a/libsigrokdecode4DSL/decoders/0-i2c/pd.py
+++ b/libsigrokdecode4DSL/decoders/0-i2c/pd.py
@@ -72,12 +72,12 @@ class Decoder(srd.Decoder):
     outputs = ['i2c']
     tags = ['Embedded/industrial']
     channels = (
-        {'id': 'scl', 'type': 8, 'name': 'SCL', 'desc': 'Serial clock line'},
-        {'id': 'sda', 'type': 108, 'name': 'SDA', 'desc': 'Serial data line'},
+        {'id': 'scl', 'type': 8, 'name': 'SCL', 'desc': 'Serial clock line', 'idn':'dec_0i2c_chan_scl'},
+        {'id': 'sda', 'type': 108, 'name': 'SDA', 'desc': 'Serial data line', 'idn':'dec_0i2c_chan_sda'},
     )
     options = (
         {'id': 'address_format', 'desc': 'Displayed slave address format',
-            'default': 'unshifted', 'values': ('shifted', 'unshifted')},
+            'default': 'unshifted', 'values': ('shifted', 'unshifted'), 'idn':'dec_0i2c_opt_addr'},
     )
     annotations = (
         ('7', 'start', 'Start condition'),
diff --git a/libsigrokdecode4DSL/decoders/0-spi/pd.py b/libsigrokdecode4DSL/decoders/0-spi/pd.py
index 939926b1..680128c2 100644
--- a/libsigrokdecode4DSL/decoders/0-spi/pd.py
+++ b/libsigrokdecode4DSL/decoders/0-spi/pd.py
@@ -85,24 +85,24 @@ class Decoder(srd.Decoder):
     outputs = ['spi']
     tags = ['Embedded/industrial']
     channels = (
-        {'id': 'clk', 'type': 0, 'name': 'CLK', 'desc': 'Clock'},
+        {'id': 'clk', 'type': 0, 'name': 'CLK', 'desc': 'Clock', 'idn':'dec_0spi_chan_clk'},
     )
     optional_channels = (
-        {'id': 'miso', 'type': 107, 'name': 'MISO', 'desc': 'Master in, slave out'},
-        {'id': 'mosi', 'type': 109, 'name': 'MOSI', 'desc': 'Master out, slave in'},
-        {'id': 'cs', 'type': -1, 'name': 'CS#', 'desc': 'Chip-select'},
+        {'id': 'miso', 'type': 107, 'name': 'MISO', 'desc': 'Master in, slave out', 'idn':'dec_0spi_opt_chan_miso'},
+        {'id': 'mosi', 'type': 109, 'name': 'MOSI', 'desc': 'Master out, slave in', 'idn':'dec_0spi_opt_chan_mosi'},
+        {'id': 'cs', 'type': -1, 'name': 'CS#', 'desc': 'Chip-select', 'idn':'dec_0spi_opt_chan_cs'},
     )
     options = (
         {'id': 'cs_polarity', 'desc': 'CS# polarity', 'default': 'active-low',
-            'values': ('active-low', 'active-high')},
+            'values': ('active-low', 'active-high'), 'idn':'dec_0spi_opt_cs_pol'},
         {'id': 'cpol', 'desc': 'Clock polarity (CPOL)', 'default': 0,
-            'values': (0, 1)},
+            'values': (0, 1), 'idn':'dec_0spi_opt_cpol'},
         {'id': 'cpha', 'desc': 'Clock phase (CPHA)', 'default': 0,
-            'values': (0, 1)},
+            'values': (0, 1), 'idn':'dec_0spi_opt_cpha'},
         {'id': 'bitorder', 'desc': 'Bit order',
-            'default': 'msb-first', 'values': ('msb-first', 'lsb-first')},
+            'default': 'msb-first', 'values': ('msb-first', 'lsb-first'), 'idn':'dec_0spi_opt_bitorder'},
         {'id': 'wordsize', 'desc': 'Word size', 'default': 8,
-            'values': tuple(range(4,129,1))},
+            'values': tuple(range(4,129,1)), 'idn':'dec_0spi_opt_wordsize'},
     )
     annotations = (
         ('106', 'miso-data', 'MISO data'),
diff --git a/libsigrokdecode4DSL/decoders/0-uart/pd.py b/libsigrokdecode4DSL/decoders/0-uart/pd.py
index dccf3a73..a9f1f19c 100644
--- a/libsigrokdecode4DSL/decoders/0-uart/pd.py
+++ b/libsigrokdecode4DSL/decoders/0-uart/pd.py
@@ -60,26 +60,26 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Embedded/industrial']
     channels = (
-        {'id': 'rxtx', 'type': 209, 'name': 'RX/TX', 'desc': 'UART transceive line'},
+        {'id': 'rxtx', 'type': 209, 'name': 'RX/TX', 'desc': 'UART transceive line', 'idn':'dec_0uart_chan_rxtx'},
     )
     options = (
-        {'id': 'baudrate', 'desc': 'Baud rate', 'default': 115200},
+        {'id': 'baudrate', 'desc': 'Baud rate', 'default': 115200, 'idn':'dec_0uart_opt_baudrate'},
         {'id': 'num_data_bits', 'desc': 'Data bits', 'default': 8,
-            'values': tuple(range(4,129,1))},
+            'values': tuple(range(4,129,1)), 'idn':'dec_0uart_opt_num_data_bits'},
         {'id': 'parity_type', 'desc': 'Parity type', 'default': 'none',
-            'values': ('none', 'odd', 'even', 'zero', 'one')},
+            'values': ('none', 'odd', 'even', 'zero', 'one'), 'idn':'dec_0uart_opt_parity_type'},
         {'id': 'parity_check', 'desc': 'Check parity?', 'default': 'yes',
-            'values': ('yes', 'no')},
+            'values': ('yes', 'no'), 'idn':'dec_0uart_opt_parity_check'},
         {'id': 'num_stop_bits', 'desc': 'Stop bits', 'default': 1.0,
-            'values': (0.0, 0.5, 1.0, 1.5, 2.0, 2.5)},
+            'values': (0.0, 0.5, 1.0, 1.5, 2.0, 2.5), 'idn':'dec_0uart_opt_num_stop_bits'},
         {'id': 'bit_order', 'desc': 'Bit order', 'default': 'lsb-first',
-            'values': ('lsb-first', 'msb-first')},
+            'values': ('lsb-first', 'msb-first'), 'idn':'dec_0uart_opt_bit_order'},
         {'id': 'format', 'desc': 'Data format', 'default': 'hex',
-            'values': ('ascii', 'dec', 'hex', 'oct', 'bin')},
+            'values': ('ascii', 'dec', 'hex', 'oct', 'bin') ,'idn':'dec_0uart_opt_format'},
         {'id': 'invert', 'desc': 'Invert Signal?', 'default': 'no',
-            'values': ('yes', 'no')},
-	{'id': 'anno_startstop', 'desc': 'Display Start/Stop?', 'default': 'no',
-            'values': ('yes', 'no')},
+            'values': ('yes', 'no'), 'idn':'dec_0uart_opt_invert'},
+	    {'id': 'anno_startstop', 'desc': 'Display Start/Stop?', 'default': 'no',
+            'values': ('yes', 'no'), 'idn':'dec_0uart_anno_startstop'},
     )
     annotations = (
         ('108', 'data', 'data'),
diff --git a/libsigrokdecode4DSL/decoders/1-i2c/pd.py b/libsigrokdecode4DSL/decoders/1-i2c/pd.py
index 3024bd6f..f69bc7b8 100644
--- a/libsigrokdecode4DSL/decoders/1-i2c/pd.py
+++ b/libsigrokdecode4DSL/decoders/1-i2c/pd.py
@@ -73,12 +73,12 @@ class Decoder(srd.Decoder):
     outputs = ['i2c']
     tags = ['Embedded/industrial']
     channels = (
-        {'id': 'scl', 'type': 8, 'name': 'SCL', 'desc': 'Serial clock line'},
-        {'id': 'sda', 'type': 108, 'name': 'SDA', 'desc': 'Serial data line'},
+        {'id': 'scl', 'type': 8, 'name': 'SCL', 'desc': 'Serial clock line', 'idn':'dec_1i2c_chan_scl'},
+        {'id': 'sda', 'type': 108, 'name': 'SDA', 'desc': 'Serial data line', 'idn':'dec_1i2c_chan_sda'},
     )
     options = (
         {'id': 'address_format', 'desc': 'Displayed slave address format',
-            'default': 'unshifted', 'values': ('shifted', 'unshifted')},
+            'default': 'unshifted', 'values': ('shifted', 'unshifted'), 'idn':'dec_1i2c_opt_addr'},
     )
     annotations = (
         ('7', 'start', 'Start condition'),
diff --git a/libsigrokdecode4DSL/decoders/1-spi/pd.py b/libsigrokdecode4DSL/decoders/1-spi/pd.py
index 9903223c..609b4a9c 100644
--- a/libsigrokdecode4DSL/decoders/1-spi/pd.py
+++ b/libsigrokdecode4DSL/decoders/1-spi/pd.py
@@ -85,26 +85,26 @@ class Decoder(srd.Decoder):
     outputs = ['spi']
     tags = ['Embedded/industrial']
     channels = (
-        {'id': 'clk', 'type': 0, 'name': 'CLK', 'desc': 'Clock'},
+        {'id': 'clk', 'type': 0, 'name': 'CLK', 'desc': 'Clock' ,'idn':'dec_1spi_chan_clk'},
     )
     optional_channels = (
-        {'id': 'miso', 'type': 107, 'name': 'MISO', 'desc': 'Master in, slave out'},
-        {'id': 'mosi', 'type': 109, 'name': 'MOSI', 'desc': 'Master out, slave in'},
-        {'id': 'cs', 'type': -1, 'name': 'CS#', 'desc': 'Chip-select'},
+        {'id': 'miso', 'type': 107, 'name': 'MISO', 'desc': 'Master in, slave out', 'idn':'dec_1spi_opt_chan_miso'},
+        {'id': 'mosi', 'type': 109, 'name': 'MOSI', 'desc': 'Master out, slave in', 'idn':'dec_1spi_opt_chan_mosi'},
+        {'id': 'cs', 'type': -1, 'name': 'CS#', 'desc': 'Chip-select', 'idn':'dec_1spi_opt_chan_cs'},
     )
     options = (
         {'id': 'cs_polarity', 'desc': 'CS# polarity', 'default': 'active-low',
-            'values': ('active-low', 'active-high')},
+            'values': ('active-low', 'active-high'), 'idn':'dec_1spi_opt_cs_pol'},
         {'id': 'cpol', 'desc': 'Clock polarity (CPOL)', 'default': 0,
-            'values': (0, 1)},
+            'values': (0, 1) , 'idn':'dec_1spi_opt_cpol'},
         {'id': 'cpha', 'desc': 'Clock phase (CPHA)', 'default': 0,
-            'values': (0, 1)},
+            'values': (0, 1), 'idn':'dec_1spi_opt_cpha'},
         {'id': 'bitorder', 'desc': 'Bit order',
-            'default': 'msb-first', 'values': ('msb-first', 'lsb-first')},
+            'default': 'msb-first', 'values': ('msb-first', 'lsb-first'), 'idn':'dec_1spi_opt_bitorder'},
         {'id': 'wordsize', 'desc': 'Word size', 'default': 8,
-            'values': tuple(range(5,129,1))},
+            'values': tuple(range(5,129,1)), 'idn':'dec_1spi_opt_wordsize'},
         {'id': 'frame', 'desc': 'Frame Decoder', 'default': 'no',
-            'values': ('yes', 'no')},
+            'values': ('yes', 'no'), 'idn':'dec_1spi_opt_frame'},
     )
     annotations = (
         ('106', 'miso-data', 'MISO data'),
diff --git a/libsigrokdecode4DSL/decoders/1-uart/pd.py b/libsigrokdecode4DSL/decoders/1-uart/pd.py
index b8b26201..b156fe44 100644
--- a/libsigrokdecode4DSL/decoders/1-uart/pd.py
+++ b/libsigrokdecode4DSL/decoders/1-uart/pd.py
@@ -85,26 +85,29 @@ class Decoder(srd.Decoder):
     outputs = ['uart']
     tags = ['Embedded/industrial']
     channels = (
-        {'id': 'rxtx', 'type': 209, 'name': 'RX/TX', 'desc': 'UART transceive line'},
+     
+        {'id': 'rxtx', 'type': 209, 'name': 'RX/TX', 'desc': 'UART transceive line', 'idn':'dec_1uart_chan_rxtx'},
     )
     options = (
-        {'id': 'baudrate', 'desc': 'Baud rate', 'default': 115200},
+
+
+        {'id': 'baudrate', 'desc': 'Baud rate', 'default': 115200, 'idn':'dec_1uart_opt_baudrate'},
         {'id': 'num_data_bits', 'desc': 'Data bits', 'default': 8,
-            'values': tuple(range(4,129,1))},
+            'values': tuple(range(4,129,1)), 'idn':'dec_1uart_opt_num_data_bits'},
         {'id': 'parity_type', 'desc': 'Parity type', 'default': 'none',
-            'values': ('none', 'odd', 'even', 'zero', 'one')},
+            'values': ('none', 'odd', 'even', 'zero', 'one'), 'idn':'dec_1uart_opt_parity_type'},
         {'id': 'parity_check', 'desc': 'Check parity?', 'default': 'yes',
-            'values': ('yes', 'no')},
+            'values': ('yes', 'no'), 'idn':'dec_1uart_opt_parity_check'},
         {'id': 'num_stop_bits', 'desc': 'Stop bits', 'default': 1.0,
-            'values': (0.0, 0.5, 1.0, 1.5, 2.0, 2.5)},
+            'values': (0.0, 0.5, 1.0, 1.5, 2.0, 2.5), 'idn':'dec_1uart_opt_num_stop_bits'},
         {'id': 'bit_order', 'desc': 'Bit order', 'default': 'lsb-first',
-            'values': ('lsb-first', 'msb-first')},
+            'values': ('lsb-first', 'msb-first'), 'idn':'dec_1uart_opt_bit_order'},
         {'id': 'format', 'desc': 'Data format', 'default': 'hex',
-            'values': ('ascii', 'dec', 'hex', 'oct', 'bin')},
+            'values': ('ascii', 'dec', 'hex', 'oct', 'bin') ,'idn':'dec_1uart_opt_format'},
         {'id': 'invert', 'desc': 'Invert Signal?', 'default': 'no',
-            'values': ('yes', 'no')},
-	{'id': 'anno_startstop', 'desc': 'Display Start/Stop?', 'default': 'yes',
-            'values': ('yes', 'no')},
+            'values': ('yes', 'no'), 'idn':'dec_1uart_opt_invert'},
+	    {'id': 'anno_startstop', 'desc': 'Display Start/Stop?', 'default': 'no',
+            'values': ('yes', 'no'), 'idn':'dec_1uart_anno_startstop'},
     )
     annotations = (
         ('108', 'data', 'data'),
diff --git a/libsigrokdecode4DSL/decoders/ac97/pd.py b/libsigrokdecode4DSL/decoders/ac97/pd.py
index 3f79eefa..f914ce6e 100644
--- a/libsigrokdecode4DSL/decoders/ac97/pd.py
+++ b/libsigrokdecode4DSL/decoders/ac97/pd.py
@@ -63,13 +63,13 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Audio', 'PC']
     channels = (
-        {'id': 'sync', 'name': 'SYNC', 'desc': 'Frame synchronization'},
-        {'id': 'clk', 'name': 'BIT_CLK', 'desc': 'Data bits clock'},
+        {'id': 'sync', 'name': 'SYNC', 'desc': 'Frame synchronization', 'idn':'dec_ac97_chan_sync'},
+        {'id': 'clk', 'name': 'BIT_CLK', 'desc': 'Data bits clock', 'idn':'dec_ac97_chan_clk'},
     )
     optional_channels = (
-        {'id': 'out', 'name': 'SDATA_OUT', 'desc': 'Data output'},
-        {'id': 'in', 'name': 'SDATA_IN', 'desc': 'Data input'},
-        {'id': 'rst', 'name': 'RESET#', 'desc': 'Reset line'},
+        {'id': 'out', 'name': 'SDATA_OUT', 'desc': 'Data output', 'idn':'dec_ac97_opt_chan_out'},
+        {'id': 'in', 'name': 'SDATA_IN', 'desc': 'Data input', 'idn':'dec_ac97_opt_chan_in'},
+        {'id': 'rst', 'name': 'RESET#', 'desc': 'Reset line', 'idn':'dec_ac97_opt_chan_rst'},
     )
     annotations = (
         ('bit-out', 'Output bits'),
diff --git a/libsigrokdecode4DSL/decoders/ad79x0/pd.py b/libsigrokdecode4DSL/decoders/ad79x0/pd.py
index 3d7ab731..f400e724 100644
--- a/libsigrokdecode4DSL/decoders/ad79x0/pd.py
+++ b/libsigrokdecode4DSL/decoders/ad79x0/pd.py
@@ -54,7 +54,7 @@ class Decoder(srd.Decoder):
         ('data_validation', 'Data validation', (2,)),
     )
     options = (
-        {'id': 'vref', 'desc': 'Reference voltage (V)', 'default': 1.5},
+        {'id': 'vref', 'desc': 'Reference voltage (V)', 'default': 1.5, 'idn':'dec_ad79x0_opt_vref'},
     )
 
     def __init__(self,):
diff --git a/libsigrokdecode4DSL/decoders/am230x/pd.py b/libsigrokdecode4DSL/decoders/am230x/pd.py
index fbc68d39..f4d05a31 100644
--- a/libsigrokdecode4DSL/decoders/am230x/pd.py
+++ b/libsigrokdecode4DSL/decoders/am230x/pd.py
@@ -44,11 +44,11 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['IC', 'Sensor']
     channels = (
-        {'id': 'sda', 'name': 'SDA', 'desc': 'Single wire serial data line'},
+        {'id': 'sda', 'name': 'SDA', 'desc': 'Single wire serial data line', 'idn':'dec_am230x_chan_sda'},
     )
     options = (
         {'id': 'device', 'desc': 'Device type',
-            'default': 'am230x', 'values': ('am230x/rht', 'dht11')},
+            'default': 'am230x', 'values': ('am230x/rht', 'dht11'), 'idn':'dec_am230x_opt_device'},
     )
     annotations = (
         ('start', 'Start'),
diff --git a/libsigrokdecode4DSL/decoders/amulet_ascii/pd.py b/libsigrokdecode4DSL/decoders/amulet_ascii/pd.py
index 71953234..c3073fb9 100644
--- a/libsigrokdecode4DSL/decoders/amulet_ascii/pd.py
+++ b/libsigrokdecode4DSL/decoders/amulet_ascii/pd.py
@@ -55,9 +55,9 @@ class Decoder(srd.Decoder):
     )
     options = (
         {'id': 'ms_chan', 'desc': 'Master -> slave channel',
-            'default': 'RX', 'values': ('RX', 'TX')},
+            'default': 'RX', 'values': ('RX', 'TX'), 'idn':'dec_amulet_ascii_opt_ms_chan'},
         {'id': 'sm_chan', 'desc': 'Slave -> master channel',
-            'default': 'TX', 'values': ('RX', 'TX')},
+            'default': 'TX', 'values': ('RX', 'TX'), 'idn':'dec_amulet_ascii_opt_sm_chan'},
     )
 
     def __init__(self):
diff --git a/libsigrokdecode4DSL/decoders/arm_etmv3/pd.py b/libsigrokdecode4DSL/decoders/arm_etmv3/pd.py
index 6649b46e..175b202b 100644
--- a/libsigrokdecode4DSL/decoders/arm_etmv3/pd.py
+++ b/libsigrokdecode4DSL/decoders/arm_etmv3/pd.py
@@ -161,13 +161,13 @@ class Decoder(srd.Decoder):
     )
     options = (
         {'id': 'objdump', 'desc': 'objdump path',
-            'default': 'arm-none-eabi-objdump'},
+            'default': 'arm-none-eabi-objdump', 'idn':'dec_arm_etmv3_opt_objdump'},
         {'id': 'objdump_opts', 'desc': 'objdump options',
-            'default': '-lSC'},
+            'default': '-lSC', 'idn':'dec_arm_etmv3_opt_objdump_opts'},
         {'id': 'elffile', 'desc': '.elf path',
-            'default': ''},
+            'default': '', 'idn':'dec_arm_etmv3_opt_elffile'},
         {'id': 'branch_enc', 'desc': 'Branch encoding',
-            'default': 'alternative', 'values': ('alternative', 'original')},
+            'default': 'alternative', 'values': ('alternative', 'original'), 'idn':'dec_arm_etmv3_opt_branch_enc'},
     )
 
     def __init__(self):
diff --git a/libsigrokdecode4DSL/decoders/arm_itm/pd.py b/libsigrokdecode4DSL/decoders/arm_itm/pd.py
index 64149787..42a798e4 100644
--- a/libsigrokdecode4DSL/decoders/arm_itm/pd.py
+++ b/libsigrokdecode4DSL/decoders/arm_itm/pd.py
@@ -48,11 +48,11 @@ class Decoder(srd.Decoder):
     tags = ['Debug/trace']
     options = (
         {'id': 'objdump', 'desc': 'objdump path',
-            'default': 'arm-none-eabi-objdump'},
+            'default': 'arm-none-eabi-objdump', 'idn':'dec_arm_itm_opt_objdump'},
         {'id': 'objdump_opts', 'desc': 'objdump options',
-            'default': '-lSC'},
+            'default': '-lSC', 'idn':'dec_arm_itm_opt_objdump_opts'},
         {'id': 'elffile', 'desc': '.elf path',
-            'default': ''},
+            'default': '', 'idn':'dec_arm_itm_opt_elffile'},
     )
     annotations = (
         ('trace', 'Trace information'),
diff --git a/libsigrokdecode4DSL/decoders/arm_tpiu/pd.py b/libsigrokdecode4DSL/decoders/arm_tpiu/pd.py
index 29b4605f..d0b77dc1 100644
--- a/libsigrokdecode4DSL/decoders/arm_tpiu/pd.py
+++ b/libsigrokdecode4DSL/decoders/arm_tpiu/pd.py
@@ -30,8 +30,8 @@ class Decoder(srd.Decoder):
     outputs = ['uart'] # Emulate uart output so that arm_itm/arm_etm can stack.
     tags = ['Debug/trace']
     options = (
-        {'id': 'stream', 'desc': 'Stream index', 'default': 1},
-        {'id': 'sync_offset', 'desc': 'Initial sync offset', 'default': 0},
+        {'id': 'stream', 'desc': 'Stream index', 'default': 1, 'idn':'dec_arm_tpiu_opt_stream'},
+        {'id': 'sync_offset', 'desc': 'Initial sync offset', 'default': 0, 'idn':'dec_arm_tpiu_sync_offset'},
     )
     annotations = (
         ('stream', 'Current stream'),
diff --git a/libsigrokdecode4DSL/decoders/aud/pd.py b/libsigrokdecode4DSL/decoders/aud/pd.py
index ad93634f..c42811ea 100644
--- a/libsigrokdecode4DSL/decoders/aud/pd.py
+++ b/libsigrokdecode4DSL/decoders/aud/pd.py
@@ -36,12 +36,12 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Debug/trace']
     channels = (
-        {'id': 'audck', 'name': 'AUDCK', 'desc': 'AUD clock'},
-        {'id': 'naudsync', 'name': 'nAUDSYNC', 'desc': 'AUD sync'},
-        {'id': 'audata3', 'name': 'AUDATA3', 'desc': 'AUD data line 3'},
-        {'id': 'audata2', 'name': 'AUDATA2', 'desc': 'AUD data line 2'},
-        {'id': 'audata1', 'name': 'AUDATA1', 'desc': 'AUD data line 1'},
-        {'id': 'audata0', 'name': 'AUDATA0', 'desc': 'AUD data line 0'},
+        {'id': 'audck', 'name': 'AUDCK', 'desc': 'AUD clock', 'idn':'dec_aud_chan_audck'},
+        {'id': 'naudsync', 'name': 'nAUDSYNC', 'desc': 'AUD sync', 'idn':'dec_aud_chan_naudsync'},
+        {'id': 'audata3', 'name': 'AUDATA3', 'desc': 'AUD data line 3', 'idn':'dec_aud_chan_audata3'},
+        {'id': 'audata2', 'name': 'AUDATA2', 'desc': 'AUD data line 2', 'idn':'dec_aud_chan_audata2'},
+        {'id': 'audata1', 'name': 'AUDATA1', 'desc': 'AUD data line 1', 'idn':'dec_aud_chan_audata1'},
+        {'id': 'audata0', 'name': 'AUDATA0', 'desc': 'AUD data line 0', 'idn':'dec_aud_chan_audata0'},
     )
     annotations = (
         ('dest', 'Destination address'),
diff --git a/libsigrokdecode4DSL/decoders/avr_pdi/pd.py b/libsigrokdecode4DSL/decoders/avr_pdi/pd.py
index 45705950..f55d856d 100644
--- a/libsigrokdecode4DSL/decoders/avr_pdi/pd.py
+++ b/libsigrokdecode4DSL/decoders/avr_pdi/pd.py
@@ -123,8 +123,8 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Debug/trace']
     channels = (
-        {'id': 'reset', 'name': 'RESET', 'desc': 'RESET / PDI_CLK'},
-        {'id': 'data', 'name': 'DATA', 'desc': 'PDI_DATA'},
+        {'id': 'reset', 'name': 'RESET', 'desc': 'RESET / PDI_CLK', 'idn':'dec_avr_pdi_chan_reset'},
+        {'id': 'data', 'name': 'DATA', 'desc': 'PDI_DATA', 'idn':'dec_avr_pdi_chan_data'},
     )
     annotations = (
         ('uart-bit', 'UART bit'),
diff --git a/libsigrokdecode4DSL/decoders/c2/pd.py b/libsigrokdecode4DSL/decoders/c2/pd.py
index 8cdc8ec5..099cf37d 100644
--- a/libsigrokdecode4DSL/decoders/c2/pd.py
+++ b/libsigrokdecode4DSL/decoders/c2/pd.py
@@ -17,8 +17,8 @@ class Decoder(srd.Decoder):
     outputs = ['C2']
     tags = ['Embedded/mcu']
     channels = (
-        {'id': 'c2ck', 'type': 0, 'name': 'c2ck', 'desc': 'Clock'},
-        {'id': 'c2d', 'type': 0, 'name': 'c2d', 'desc': 'Data'},
+        {'id': 'c2ck', 'type': 0, 'name': 'c2ck', 'desc': 'Clock', 'idn':'dec_c2_chan_c2ck'},
+        {'id': 'c2d', 'type': 0, 'name': 'c2d', 'desc': 'Data', 'idn':'dec_c2_chan_c2d'},
     )
     optional_channels = ()
     annotations = (
@@ -66,7 +66,7 @@ class Decoder(srd.Decoder):
         tr=0
         while True:
             (c2ck,c2d)=self.wait({0:'e'})
-            if c2ck == 0:   #ϽµÑØ   
+            if c2ck == 0:   #�½���   
                 tf=self.samplenum
                 if self.state == 'dataRead':
                     if self.bitcount ==0:
@@ -106,7 +106,7 @@ class Decoder(srd.Decoder):
                         self.put(ss, tf, self.out_ann, [0, ['Wait','W']])
                         self.state = 'end'
                     
-            else: #ÉÏÉýÑØ
+            else: #������
                 tr=self.samplenum
                 interval=(tr-tf)*1000*1000/self.samplerate #us
                 if interval>20:
diff --git a/libsigrokdecode4DSL/decoders/caliper/pd.py b/libsigrokdecode4DSL/decoders/caliper/pd.py
index b9e5851f..385b73b4 100644
--- a/libsigrokdecode4DSL/decoders/caliper/pd.py
+++ b/libsigrokdecode4DSL/decoders/caliper/pd.py
@@ -37,16 +37,16 @@ class Decoder(srd.Decoder):
     inputs = ['logic']
     outputs = []
     channels = (
-        {'id': 'clk', 'name': 'CLK', 'desc': 'Serial clock line'},
-        {'id': 'data', 'name': 'DATA', 'desc': 'Serial data line'},
+        {'id': 'clk', 'name': 'CLK', 'desc': 'Serial clock line', 'idn':'dec_caliper_chan_clk'},
+        {'id': 'data', 'name': 'DATA', 'desc': 'Serial data line', 'idn':'dec_caliper_chan_data'},
     )
     options = (
         {'id': 'timeout_ms', 'desc': 'Packet timeout in ms, 0 to disable',
-            'default': 10},
+            'default': 10, 'idn':'dec_caliper_opt_timeout_ms'},
         {'id': 'unit', 'desc': 'Convert units', 'default': 'keep',
-            'values': ('keep', 'mm', 'inch')},
+            'values': ('keep', 'mm', 'inch'), 'idn':'dec_caliper_opt_unit'},
         {'id': 'changes', 'desc': 'Changes only', 'default': 'no',
-            'values': ('no', 'yes')},
+            'values': ('no', 'yes'), 'idn':'dec_caliper_opt_changes'},
     )
     tags = ['Analog/digital', 'Sensor']
     annotations = (
diff --git a/libsigrokdecode4DSL/decoders/can/pd.py b/libsigrokdecode4DSL/decoders/can/pd.py
index ceb79b74..4f3207ba 100644
--- a/libsigrokdecode4DSL/decoders/can/pd.py
+++ b/libsigrokdecode4DSL/decoders/can/pd.py
@@ -34,11 +34,11 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Automotive']
     channels = (
-        {'id': 'can_rx', 'name': 'CAN', 'desc': 'CAN bus line'},
+        {'id': 'can_rx', 'name': 'CAN', 'desc': 'CAN bus line', 'idn':'dec_can_chan_can_rx'},
     )
     options = (
-        {'id': 'bitrate', 'desc': 'Bitrate (bits/s)', 'default': 1000000},
-        {'id': 'sample_point', 'desc': 'Sample point (%)', 'default': 70.0},
+        {'id': 'bitrate', 'desc': 'Bitrate (bits/s)', 'default': 1000000, 'idn':'dec_can_opt_bitrate'},
+        {'id': 'sample_point', 'desc': 'Sample point (%)', 'default': 70.0, 'idn':'dec_can_opt_sample_point'},
     )
     annotations = (
         ('data', 'CAN payload data'),
diff --git a/libsigrokdecode4DSL/decoders/cec/pd.py b/libsigrokdecode4DSL/decoders/cec/pd.py
index 363a0497..0b4a1b73 100644
--- a/libsigrokdecode4DSL/decoders/cec/pd.py
+++ b/libsigrokdecode4DSL/decoders/cec/pd.py
@@ -59,7 +59,7 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Display', 'PC']
     channels = (
-        {'id': 'cec', 'name': 'CEC', 'desc': 'CEC bus data'},
+        {'id': 'cec', 'name': 'CEC', 'desc': 'CEC bus data', 'idn':'dec_cec_chan_cec'},
     )
     annotations = (
         ('st', 'Start'),
diff --git a/libsigrokdecode4DSL/decoders/cjtag-oscan0/pd.py b/libsigrokdecode4DSL/decoders/cjtag-oscan0/pd.py
index 44cf89f0..0c84b67b 100644
--- a/libsigrokdecode4DSL/decoders/cjtag-oscan0/pd.py
+++ b/libsigrokdecode4DSL/decoders/cjtag-oscan0/pd.py
@@ -75,15 +75,15 @@ class Decoder(srd.Decoder):
     outputs = ['jtag']
     tags = ['Debug/trace']
     channels = (
-        {'id': 'tdi',  'name': 'TDI',  'desc': 'Test data input'},
-        {'id': 'tdo',  'name': 'TDO',  'desc': 'Test data output'},
-        {'id': 'tck',  'name': 'TCK',  'desc': 'Test clock'},
-        {'id': 'tms',  'name': 'TMS',  'desc': 'Test mode select'},
+        {'id': 'tdi',  'name': 'TDI',  'desc': 'Test data input', 'idn':'dec_cjtag_oscan0_chan_tdi'},
+        {'id': 'tdo',  'name': 'TDO',  'desc': 'Test data output', 'idn':'dec_cjtag_oscan0_chan_tdo'},
+        {'id': 'tck',  'name': 'TCK',  'desc': 'Test clock', 'idn':'dec_cjtag_oscan0_chan_tck'},
+        {'id': 'tms',  'name': 'TMS',  'desc': 'Test mode select', 'idn':'dec_cjtag_oscan0_chan_tms'},
     )
     optional_channels = (
-        {'id': 'trst', 'name': 'TRST#', 'desc': 'Test reset'},
-        {'id': 'srst', 'name': 'SRST#', 'desc': 'System reset'},
-        {'id': 'rtck', 'name': 'RTCK',  'desc': 'Return clock signal'},
+        {'id': 'trst', 'name': 'TRST#', 'desc': 'Test reset', 'idn':'dec_cjtag_oscan0_opt_chan_trst'},
+        {'id': 'srst', 'name': 'SRST#', 'desc': 'System reset', 'idn':'dec_cjtag_oscan0_opt_chan_srst'},
+        {'id': 'rtck', 'name': 'RTCK',  'desc': 'Return clock signal', 'idn':'dec_cjtag_oscan0_opt_chan_rtck'},
     )
     annotations = tuple([tuple([s.lower(), s]) for s in jtag_states]) + ( \
         ('bit-tdi', 'Bit (TDI)'),
diff --git a/libsigrokdecode4DSL/decoders/counter/pd.py b/libsigrokdecode4DSL/decoders/counter/pd.py
index b0b1af71..a9f35362 100644
--- a/libsigrokdecode4DSL/decoders/counter/pd.py
+++ b/libsigrokdecode4DSL/decoders/counter/pd.py
@@ -33,10 +33,10 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Util']
     channels = (
-        {'id': 'data', 'name': 'Data', 'desc': 'Data line'},
+        {'id': 'data', 'name': 'Data', 'desc': 'Data line', 'idn':'dec_counter_chan_data'},
     )
     optional_channels = (
-        {'id': 'reset', 'name': 'Reset', 'desc': 'Reset line'},
+        {'id': 'reset', 'name': 'Reset', 'desc': 'Reset line', 'idn':'dec_counter_opt_chan_reset'},
     )
     annotations = (
         ('edge_count', 'Edge count'),
@@ -50,15 +50,15 @@ class Decoder(srd.Decoder):
     )
     options = (
         {'id': 'data_edge', 'desc': 'Edges to count (data)', 'default': 'any',
-            'values': ('any', 'rising', 'falling')},
-        {'id': 'divider', 'desc': 'Count divider (word width)', 'default': 0},
+            'values': ('any', 'rising', 'falling'), 'idn':'dec_counter_opt_data_edge'},
+        {'id': 'divider', 'desc': 'Count divider (word width)', 'default': 0, 'idn':'dec_counter_opt_divider'},
         {'id': 'reset_edge', 'desc': 'Edge which clears counters (reset)',
-            'default': 'falling', 'values': ('rising', 'falling')},
-        {'id': 'edge_off', 'desc': 'Edge counter value after start/reset', 'default': 0},
-        {'id': 'word_off', 'desc': 'Word counter value after start/reset', 'default': 0},
-        {'id': 'dead_cycles', 'desc': 'Ignore this many edges after reset', 'default': 0},
+            'default': 'falling', 'values': ('rising', 'falling'), 'idn':'dec_counter_opt_reset_edge'},
+        {'id': 'edge_off', 'desc': 'Edge counter value after start/reset', 'default': 0, 'idn':'dec_counter_opt_edge_off'},
+        {'id': 'word_off', 'desc': 'Word counter value after start/reset', 'default': 0, 'idn':'dec_counter_opt_word_off'},
+        {'id': 'dead_cycles', 'desc': 'Ignore this many edges after reset', 'default': 0, 'idn':'dec_counter_opt_dead_cycles'},
         {'id': 'start_with_reset', 'desc': 'Assume decode starts with reset',
-            'default': 'no', 'values': ('no', 'yes')},
+            'default': 'no', 'values': ('no', 'yes'), 'idn':'dec_counter_opt_start_with_reset'},
     )
 
     def __init__(self):
diff --git a/libsigrokdecode4DSL/decoders/dali/pd.py b/libsigrokdecode4DSL/decoders/dali/pd.py
index 53147463..2d0c4b05 100644
--- a/libsigrokdecode4DSL/decoders/dali/pd.py
+++ b/libsigrokdecode4DSL/decoders/dali/pd.py
@@ -34,11 +34,11 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Embedded/industrial', 'Lighting']
     channels = (
-        {'id': 'dali', 'name': 'DALI', 'desc': 'DALI data line'},
+        {'id': 'dali', 'name': 'DALI', 'desc': 'DALI data line', 'idn':'dec_dali_chan_dali'},
     )
     options = (
         {'id': 'polarity', 'desc': 'Polarity', 'default': 'active-low',
-            'values': ('active-low', 'active-high')},
+            'values': ('active-low', 'active-high'), 'idn':'dec_dali_opt_polarity'},
     )
     annotations = (
         ('bit', 'Bit'),
diff --git a/libsigrokdecode4DSL/decoders/dcf77/pd.py b/libsigrokdecode4DSL/decoders/dcf77/pd.py
index 7365134e..7fb864e2 100644
--- a/libsigrokdecode4DSL/decoders/dcf77/pd.py
+++ b/libsigrokdecode4DSL/decoders/dcf77/pd.py
@@ -35,7 +35,7 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Clock/timing']
     channels = (
-        {'id': 'data', 'name': 'DATA', 'desc': 'DATA line'},
+        {'id': 'data', 'name': 'DATA', 'desc': 'DATA line', 'idn':'dec_dcf77_chan_data'},
     )
     annotations = (
         ('start-of-minute', 'Start of minute'),
diff --git a/libsigrokdecode4DSL/decoders/dmx512/pd.py b/libsigrokdecode4DSL/decoders/dmx512/pd.py
index 355095ee..fb221827 100644
--- a/libsigrokdecode4DSL/decoders/dmx512/pd.py
+++ b/libsigrokdecode4DSL/decoders/dmx512/pd.py
@@ -30,11 +30,11 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Embedded/industrial', 'Lighting']
     channels = (
-        {'id': 'dmx', 'name': 'DMX data', 'desc': 'Any DMX data line'},
+        {'id': 'dmx', 'name': 'DMX data', 'desc': 'Any DMX data line', 'idn':'dec_dmx512_chan_dmx'},
     )
     options = (
         {'id': 'invert', 'desc': 'Invert Signal?', 'default': 'no',
-            'values': ('yes', 'no')},
+            'values': ('yes', 'no'), 'idn':'dec_dmx512_opt_invert'},
     )
     annotations = (
         ('bit', 'Bit'),
diff --git a/libsigrokdecode4DSL/decoders/dsi/pd.py b/libsigrokdecode4DSL/decoders/dsi/pd.py
index 7ce95179..3a2d2af6 100644
--- a/libsigrokdecode4DSL/decoders/dsi/pd.py
+++ b/libsigrokdecode4DSL/decoders/dsi/pd.py
@@ -33,11 +33,11 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Embedded/industrial', 'Lighting']
     channels = (
-        {'id': 'dsi', 'name': 'DSI', 'desc': 'DSI data line'},
+        {'id': 'dsi', 'name': 'DSI', 'desc': 'DSI data line', 'idn':'dec_dsi_chan_dsi'},
     )
     options = (
         {'id': 'polarity', 'desc': 'Polarity', 'default': 'active-high',
-            'values': ('active-low', 'active-high')},
+            'values': ('active-low', 'active-high'), 'idn':'dec_dsi_opt_polarity'},
     )
     annotations = (
         ('bit', 'Bit'),
diff --git a/libsigrokdecode4DSL/decoders/eeprom24xx/pd.py b/libsigrokdecode4DSL/decoders/eeprom24xx/pd.py
index 033a44b2..c8c08d41 100644
--- a/libsigrokdecode4DSL/decoders/eeprom24xx/pd.py
+++ b/libsigrokdecode4DSL/decoders/eeprom24xx/pd.py
@@ -32,9 +32,9 @@ class Decoder(srd.Decoder):
     tags = ['IC', 'Memory']
     options = (
         {'id': 'chip', 'desc': 'Chip', 'default': 'generic',
-            'values': tuple(chips.keys())},
+            'values': tuple(chips.keys()), 'idn':'dec_eeprom24xx_opt_chip'},
         {'id': 'addr_counter', 'desc': 'Initial address counter value',
-            'default': 0},
+            'default': 0, 'idn':'dec_eeprom24xx_opt_addr_counter'},
     )
     annotations = (
         # Warnings
diff --git a/libsigrokdecode4DSL/decoders/eeprom93xx/pd.py b/libsigrokdecode4DSL/decoders/eeprom93xx/pd.py
index 7b64e59a..6811de3f 100644
--- a/libsigrokdecode4DSL/decoders/eeprom93xx/pd.py
+++ b/libsigrokdecode4DSL/decoders/eeprom93xx/pd.py
@@ -30,8 +30,8 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['IC', 'Memory']
     options = (
-        {'id': 'addresssize', 'desc': 'Address size', 'default': 8},
-        {'id': 'wordsize', 'desc': 'Word size', 'default': 16},
+        {'id': 'addresssize', 'desc': 'Address size', 'default': 8, 'idn':'dec_eeprom93xx_opt_addresssize'},
+        {'id': 'wordsize', 'desc': 'Word size', 'default': 16, 'idn':'dec_eeprom93xx_opt_wordsize'},
     )
     annotations = (
         ('si-data', 'SI data'),
diff --git a/libsigrokdecode4DSL/decoders/em4100/pd.py b/libsigrokdecode4DSL/decoders/em4100/pd.py
index 7f42ad70..d6ce70d4 100644
--- a/libsigrokdecode4DSL/decoders/em4100/pd.py
+++ b/libsigrokdecode4DSL/decoders/em4100/pd.py
@@ -33,16 +33,14 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['IC', 'RFID']
     channels = (
-        {'id': 'data', 'name': 'Data', 'desc': 'Data line'},
+        {'id': 'data', 'name': 'Data', 'desc': 'Data line', 'idn':'dec_em4100_chan_data'},
     )
     options = (
         {'id': 'polarity', 'desc': 'Polarity', 'default': 'active-high',
-            'values': ('active-low', 'active-high')},
+            'values': ('active-low', 'active-high'), 'idn':'dec_em4100_opt_polarity'},
         {'id': 'datarate' , 'desc': 'Data rate', 'default': 64,
-            'values': (64, 32, 16)},
-#        {'id': 'coding', 'desc': 'Bit coding', 'default': 'biphase',
-#            'values': ('biphase', 'manchester', 'psk')},
-        {'id': 'coilfreq', 'desc': 'Coil frequency', 'default': 125000},
+            'values': (64, 32, 16), 'idn':'dec_em4100_opt_datarate'},
+        {'id': 'coilfreq', 'desc': 'Coil frequency', 'default': 125000, 'idn':'dec_em4100_opt_coilfreq'},
     )
     annotations = (
         ('bit', 'Bit'),
diff --git a/libsigrokdecode4DSL/decoders/em4305/pd.py b/libsigrokdecode4DSL/decoders/em4305/pd.py
index 6297643c..4688527e 100644
--- a/libsigrokdecode4DSL/decoders/em4305/pd.py
+++ b/libsigrokdecode4DSL/decoders/em4305/pd.py
@@ -33,17 +33,17 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['IC', 'RFID']
     channels = (
-        {'id': 'data', 'name': 'Data', 'desc': 'Data line'},
+        {'id': 'data', 'name': 'Data', 'desc': 'Data line', 'idn':'dec_em4305_chan_data'},
     )
     options = (
-        {'id': 'coilfreq', 'desc': 'Coil frequency', 'default': 125000},
-        {'id': 'first_field_stop', 'desc': 'First field stop min', 'default': 40},
-        {'id': 'w_gap', 'desc': 'Write gap min', 'default': 12},
-        {'id': 'w_one_max', 'desc': 'Write one max', 'default': 32},
-        {'id': 'w_zero_on_min', 'desc': 'Write zero on min', 'default': 15},
-        {'id': 'w_zero_off_max', 'desc': 'Write zero off max', 'default': 27},
+        {'id': 'coilfreq', 'desc': 'Coil frequency', 'default': 125000, 'idn':'dec_em4305_opt_coilfreq'},
+        {'id': 'first_field_stop', 'desc': 'First field stop min', 'default': 40, 'idn':'dec_em4305_opt_first_field_stop'},
+        {'id': 'w_gap', 'desc': 'Write gap min', 'default': 12, 'idn':'dec_em4305_opt_w_gap'},
+        {'id': 'w_one_max', 'desc': 'Write one max', 'default': 32, 'idn':'dec_em4305_opt_w_one_max'},
+        {'id': 'w_zero_on_min', 'desc': 'Write zero on min', 'default': 15, 'idn':'dec_em4305_opt_w_zero_on_min'},
+        {'id': 'w_zero_off_max', 'desc': 'Write zero off max', 'default': 27, 'idn':'dec_em4305_opt_w_zero_off_max'},
         {'id': 'em4100_decode', 'desc': 'EM4100 decode', 'default': 'on',
-            'values': ('on', 'off')},
+            'values': ('on', 'off'), 'idn':'dec_em4305_opt_em4100_decode'},
     )
     annotations = (
         ('bit_value', 'Bit value'),
diff --git a/libsigrokdecode4DSL/decoders/eth_an/pd.py b/libsigrokdecode4DSL/decoders/eth_an/pd.py
index bf0f5801..e6399bb8 100644
--- a/libsigrokdecode4DSL/decoders/eth_an/pd.py
+++ b/libsigrokdecode4DSL/decoders/eth_an/pd.py
@@ -30,7 +30,7 @@ class Decoder(srd.Decoder):
     outputs = ['eth_an']
     tags = ['PC']
     channels = (
-        {'id': 'dp', 'name': 'TX+', 'desc': 'ETH TX+ signal'},
+        {'id': 'dp', 'name': 'TX+', 'desc': 'ETH TX+ signal', 'idn':'dec_eth_an_chan_dp'},
     )
     annotations = (
         ('data', 'FLP data'),
diff --git a/libsigrokdecode4DSL/decoders/flexray/pd.py b/libsigrokdecode4DSL/decoders/flexray/pd.py
index fc52b95f..92240425 100644
--- a/libsigrokdecode4DSL/decoders/flexray/pd.py
+++ b/libsigrokdecode4DSL/decoders/flexray/pd.py
@@ -53,13 +53,13 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Automotive']
     channels = (
-        {'id': 'channel', 'name': 'Channel', 'desc': 'FlexRay bus channel'},
+        {'id': 'channel', 'name': 'Channel', 'desc': 'FlexRay bus channel', 'idn':'dec_flexray_chan_channel'},
     )
     options = (
         {'id': 'channel_type', 'desc': 'Channel type', 'default': 'A',
-            'values': ('A', 'B')},
+            'values': ('A', 'B'), 'idn':'dec_flexray_opt_channel_type'},
         {'id': 'bitrate', 'desc': 'Bitrate (bit/s)', 'default': 10000000,
-            'values': (10000000, 5000000, 2500000)},
+            'values': (10000000, 5000000, 2500000), 'idn':'dec_flexray_opt_bitrate'},
     )
     annotations = (
         ('data', 'FlexRay payload data'),
diff --git a/libsigrokdecode4DSL/decoders/fsi/pd.py b/libsigrokdecode4DSL/decoders/fsi/pd.py
index 4b6b69f6..6784768b 100644
--- a/libsigrokdecode4DSL/decoders/fsi/pd.py
+++ b/libsigrokdecode4DSL/decoders/fsi/pd.py
@@ -38,8 +38,8 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['PC']
     channels = (
-        {'id': 'data',  'name': 'DATA',  'desc': 'Frame'},
-        {'id': 'clock', 'name': 'CLOCK', 'desc': 'Clock'},
+        {'id': 'data',  'name': 'DATA',  'desc': 'Frame', 'idn':'dec_fsi_chan_data'},
+        {'id': 'clock', 'name': 'CLOCK', 'desc': 'Clock', 'idn':'dec_fsi_chan_clock'},
     )
     annotations = (
         ('warnings', 'Warnings'),
diff --git a/libsigrokdecode4DSL/decoders/gpib/pd.py b/libsigrokdecode4DSL/decoders/gpib/pd.py
index f0c963c2..0ce13d45 100644
--- a/libsigrokdecode4DSL/decoders/gpib/pd.py
+++ b/libsigrokdecode4DSL/decoders/gpib/pd.py
@@ -31,25 +31,25 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['PC']
     channels = (
-        {'id': 'dio1' , 'name': 'DIO1', 'desc': 'Data I/O bit 1'},
-        {'id': 'dio2' , 'name': 'DIO2', 'desc': 'Data I/O bit 2'},
-        {'id': 'dio3' , 'name': 'DIO3', 'desc': 'Data I/O bit 3'},
-        {'id': 'dio4' , 'name': 'DIO4', 'desc': 'Data I/O bit 4'},
-        {'id': 'dio5' , 'name': 'DIO5', 'desc': 'Data I/O bit 5'},
-        {'id': 'dio6' , 'name': 'DIO6', 'desc': 'Data I/O bit 6'},
-        {'id': 'dio7' , 'name': 'DIO7', 'desc': 'Data I/O bit 7'},
-        {'id': 'dio8' , 'name': 'DIO8', 'desc': 'Data I/O bit 8'},
-        {'id': 'eoi', 'name': 'EOI', 'desc': 'End or identify'},
-        {'id': 'dav', 'name': 'DAV', 'desc': 'Data valid'},
-        {'id': 'nrfd', 'name': 'NRFD', 'desc': 'Not ready for data'},
-        {'id': 'ndac', 'name': 'NDAC', 'desc': 'Not data accepted'},
-        {'id': 'ifc', 'name': 'IFC', 'desc': 'Interface clear'},
-        {'id': 'srq', 'name': 'SRQ', 'desc': 'Service request'},
-        {'id': 'atn', 'name': 'ATN', 'desc': 'Attention'},
-        {'id': 'ren', 'name': 'REN', 'desc': 'Remote enable'},
+        {'id': 'dio1' , 'name': 'DIO1', 'desc': 'Data I/O bit 1', 'idn':'dec_gpib_chan_dio1'},
+        {'id': 'dio2' , 'name': 'DIO2', 'desc': 'Data I/O bit 2', 'idn':'dec_gpib_chan_dio2'},
+        {'id': 'dio3' , 'name': 'DIO3', 'desc': 'Data I/O bit 3', 'idn':'dec_gpib_chan_dio3'},
+        {'id': 'dio4' , 'name': 'DIO4', 'desc': 'Data I/O bit 4', 'idn':'dec_gpib_chan_dio4'},
+        {'id': 'dio5' , 'name': 'DIO5', 'desc': 'Data I/O bit 5', 'idn':'dec_gpib_chan_dio5'},
+        {'id': 'dio6' , 'name': 'DIO6', 'desc': 'Data I/O bit 6', 'idn':'dec_gpib_chan_dio6'},
+        {'id': 'dio7' , 'name': 'DIO7', 'desc': 'Data I/O bit 7', 'idn':'dec_gpib_chan_dio7'},
+        {'id': 'dio8' , 'name': 'DIO8', 'desc': 'Data I/O bit 8', 'idn':'dec_gpib_chan_dio8'},
+        {'id': 'eoi', 'name': 'EOI', 'desc': 'End or identify', 'idn':'dec_gpib_chan_eoi'},
+        {'id': 'dav', 'name': 'DAV', 'desc': 'Data valid', 'idn':'dec_gpib_chan_dav'},
+        {'id': 'nrfd', 'name': 'NRFD', 'desc': 'Not ready for data', 'idn':'dec_gpib_chan_nrfd'},
+        {'id': 'ndac', 'name': 'NDAC', 'desc': 'Not data accepted', 'idn':'dec_gpib_chan_ndac'},
+        {'id': 'ifc', 'name': 'IFC', 'desc': 'Interface clear', 'idn':'dec_gpib_chan_ifc'},
+        {'id': 'srq', 'name': 'SRQ', 'desc': 'Service request', 'idn':'dec_gpib_chan_srq'},
+        {'id': 'atn', 'name': 'ATN', 'desc': 'Attention', 'idn':'dec_gpib_chan_atn'},
+        {'id': 'ren', 'name': 'REN', 'desc': 'Remote enable', 'idn':'dec_gpib_chan_ren'},
     )
     options = (
-        {'id': 'sample_total', 'desc': 'Total number of samples', 'default': 0},
+        {'id': 'sample_total', 'desc': 'Total number of samples', 'default': 0, 'idn':'dec_gpib_opt_sample_total'},
     )
     annotations = (
         ('items', 'Items'),
diff --git a/libsigrokdecode4DSL/decoders/graycode/pd.py b/libsigrokdecode4DSL/decoders/graycode/pd.py
index 9303c33a..d38cd1e6 100644
--- a/libsigrokdecode4DSL/decoders/graycode/pd.py
+++ b/libsigrokdecode4DSL/decoders/graycode/pd.py
@@ -84,12 +84,12 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Encoding']
     optional_channels = tuple(
-        {'id': 'd{}'.format(i), 'name': 'D{}'.format(i), 'desc': 'Data line {}'.format(i)}
+        {'id': 'd{}'.format(i), 'name': 'D{}'.format(i), 'desc': 'Data line {}'.format(i), 'idn':'dec_graycode_opt_chan_d{}'.format(i)}
         for i in range(MAX_CHANNELS)
     )
     options = (
-        {'id': 'edges', 'desc': 'Edges per rotation', 'default': 0},
-        {'id': 'avg_period', 'desc': 'Averaging period', 'default': 10},
+        {'id': 'edges', 'desc': 'Edges per rotation', 'default': 0, 'idn':'dec_graycode_opt_edges'},
+        {'id': 'avg_period', 'desc': 'Averaging period', 'default': 10, 'idn':'dec_graycode_opt_avg_period'},
     )
     annotations = (
         ('phase', 'Phase'),
diff --git a/libsigrokdecode4DSL/decoders/guess_bitrate/pd.py b/libsigrokdecode4DSL/decoders/guess_bitrate/pd.py
index 462fa8aa..e0f5df55 100644
--- a/libsigrokdecode4DSL/decoders/guess_bitrate/pd.py
+++ b/libsigrokdecode4DSL/decoders/guess_bitrate/pd.py
@@ -33,7 +33,7 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Clock/timing', 'Util']
     channels = (
-        {'id': 'data', 'name': 'Data', 'desc': 'Data line'},
+        {'id': 'data', 'name': 'Data', 'desc': 'Data line', 'idn':'dec_guess_bitrate_chan_data'},
     )
     annotations = (
         ('bitrate', 'Bitrate / baudrate'),
diff --git a/libsigrokdecode4DSL/decoders/i2cfilter/pd.py b/libsigrokdecode4DSL/decoders/i2cfilter/pd.py
index 7798e17a..b6418756 100644
--- a/libsigrokdecode4DSL/decoders/i2cfilter/pd.py
+++ b/libsigrokdecode4DSL/decoders/i2cfilter/pd.py
@@ -34,9 +34,9 @@ class Decoder(srd.Decoder):
     tags = ['Util']
     options = (
         {'id': 'address', 'desc': 'Address to filter out of the I²C stream',
-            'default': 0},
+            'default': 0, 'idn':'dec_i2cfilter_opt_address'},
         {'id': 'direction', 'desc': 'Direction to filter', 'default': 'both',
-            'values': ('read', 'write', 'both')}
+            'values': ('read', 'write', 'both'), 'idn':'dec_i2cfilter_opt_direction'}
     )
 
     def __init__(self):
diff --git a/libsigrokdecode4DSL/decoders/i2s/pd.py b/libsigrokdecode4DSL/decoders/i2s/pd.py
index 7e4959ec..48af0c76 100644
--- a/libsigrokdecode4DSL/decoders/i2s/pd.py
+++ b/libsigrokdecode4DSL/decoders/i2s/pd.py
@@ -45,23 +45,23 @@ class Decoder(srd.Decoder):
     outputs = ['i2s']
     tags = ['Audio', 'PC']
     channels = (
-        {'id': 'sck', 'name': 'SCK', 'desc': 'Bit clock line'},
-        {'id': 'ws', 'name': 'WS', 'desc': 'Word select line'},
-        {'id': 'sd', 'name': 'SD', 'desc': 'Serial data line'},
+        {'id': 'sck', 'name': 'SCK', 'desc': 'Bit clock line', 'idn':'dec_i2s_chan_sck'},
+        {'id': 'ws', 'name': 'WS', 'desc': 'Word select line', 'idn':'dec_i2s_chan_ws'},
+        {'id': 'sd', 'name': 'SD', 'desc': 'Serial data line', 'idn':'dec_i2s_chan_sd'},
     )
     options = (
         {'id': 'ws_polarity', 'desc': 'WS polarity', 'default': 'left-high',
-            'values': ('left-low', 'left-high')},
+            'values': ('left-low', 'left-high'), 'idn':'dec_i2s_opt_ws_polarity'},
         {'id': 'clk_edge', 'desc': 'SCK active edge', 'default': 'rising-edge',
-            'values': ('rising-edge', 'falling-edge')},
+            'values': ('rising-edge', 'falling-edge'), 'idn':'dec_i2s_opt_clk_edge'},
         {'id': 'bit_shift', 'desc': 'Bit shift', 'default': 'none',
-            'values': ('right-shifted by one', 'none')},
+            'values': ('right-shifted by one', 'none'), 'idn':'dec_i2s_opt_bit_shift'},
         {'id': 'bit_align', 'desc': 'Bit align', 'default': 'left-aligned',
-            'values': ('left-aligned', 'right-aligned')},
+            'values': ('left-aligned', 'right-aligned'), 'idn':'dec_i2s_opt_bit_align'},
         {'id': 'bitorder', 'desc': 'Bit order',
-            'default': 'msb-first', 'values': ('msb-first', 'lsb-first')},
+            'default': 'msb-first', 'values': ('msb-first', 'lsb-first'), 'idn':'dec_i2s_opt_bitorder'},
         {'id': 'wordsize', 'desc': 'Word size', 'default': 16,
-            'values': tuple(range(4,129,1))},
+            'values': tuple(range(4,129,1)), 'idn':'dec_i2s_opt_wordsize'},
     )
     annotations = (
         ('left', 'Left channel'),
diff --git a/libsigrokdecode4DSL/decoders/iec/pd.py b/libsigrokdecode4DSL/decoders/iec/pd.py
index 13ac1bca..e87a59f5 100644
--- a/libsigrokdecode4DSL/decoders/iec/pd.py
+++ b/libsigrokdecode4DSL/decoders/iec/pd.py
@@ -38,12 +38,12 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['PC', 'Retro computing']
     channels = (
-        {'id': 'data', 'name': 'DATA', 'desc': 'Data I/O'},
-        {'id': 'clk', 'name': 'CLK', 'desc': 'Clock'},
-        {'id': 'atn', 'name': 'ATN', 'desc': 'Attention'},
+        {'id': 'data', 'name': 'DATA', 'desc': 'Data I/O', 'idn':'dec_iec_chan_data'},
+        {'id': 'clk', 'name': 'CLK', 'desc': 'Clock', 'idn':'dec_iec_chan_clk'},
+        {'id': 'atn', 'name': 'ATN', 'desc': 'Attention', 'idn':'dec_iec_chan_atn'},
     )
     optional_channels = (
-        {'id': 'srq', 'name': 'SRQ', 'desc': 'Service request'},
+        {'id': 'srq', 'name': 'SRQ', 'desc': 'Service request', 'idn':'dec_iec_opt_chan_srq'},
     )
     annotations = (
         ('items', 'Items'),
diff --git a/libsigrokdecode4DSL/decoders/ieee488/pd.py b/libsigrokdecode4DSL/decoders/ieee488/pd.py
index 5fb6fa88..078e0748 100644
--- a/libsigrokdecode4DSL/decoders/ieee488/pd.py
+++ b/libsigrokdecode4DSL/decoders/ieee488/pd.py
@@ -263,31 +263,31 @@ class Decoder(srd.Decoder):
     tags = ['PC', 'Retro computing']
     channels = (
         {'id': 'dio1' , 'name': 'DIO1/DATA',
-            'desc': 'Data I/O bit 1, or serial data'},
+            'desc': 'Data I/O bit 1, or serial data', 'idn':'dec_ieee488_chan_dio1'},
     )
     optional_channels = (
-        {'id': 'dio2' , 'name': 'DIO2', 'desc': 'Data I/O bit 2'},
-        {'id': 'dio3' , 'name': 'DIO3', 'desc': 'Data I/O bit 3'},
-        {'id': 'dio4' , 'name': 'DIO4', 'desc': 'Data I/O bit 4'},
-        {'id': 'dio5' , 'name': 'DIO5', 'desc': 'Data I/O bit 5'},
-        {'id': 'dio6' , 'name': 'DIO6', 'desc': 'Data I/O bit 6'},
-        {'id': 'dio7' , 'name': 'DIO7', 'desc': 'Data I/O bit 7'},
-        {'id': 'dio8' , 'name': 'DIO8', 'desc': 'Data I/O bit 8'},
-        {'id': 'eoi', 'name': 'EOI', 'desc': 'End or identify'},
-        {'id': 'dav', 'name': 'DAV', 'desc': 'Data valid'},
-        {'id': 'nrfd', 'name': 'NRFD', 'desc': 'Not ready for data'},
-        {'id': 'ndac', 'name': 'NDAC', 'desc': 'Not data accepted'},
-        {'id': 'ifc', 'name': 'IFC', 'desc': 'Interface clear'},
-        {'id': 'srq', 'name': 'SRQ', 'desc': 'Service request'},
-        {'id': 'atn', 'name': 'ATN', 'desc': 'Attention'},
-        {'id': 'ren', 'name': 'REN', 'desc': 'Remote enable'},
-        {'id': 'clk', 'name': 'CLK', 'desc': 'Serial clock'},
+        {'id': 'dio2' , 'name': 'DIO2', 'desc': 'Data I/O bit 2', 'idn':'dec_ieee488_opt_chan_dio2'},
+        {'id': 'dio3' , 'name': 'DIO3', 'desc': 'Data I/O bit 3', 'idn':'dec_ieee488_opt_chan_dio3'},
+        {'id': 'dio4' , 'name': 'DIO4', 'desc': 'Data I/O bit 4', 'idn':'dec_ieee488_opt_chan_dio4'},
+        {'id': 'dio5' , 'name': 'DIO5', 'desc': 'Data I/O bit 5', 'idn':'dec_ieee488_opt_chan_dio5'},
+        {'id': 'dio6' , 'name': 'DIO6', 'desc': 'Data I/O bit 6', 'idn':'dec_ieee488_opt_chan_dio6'},
+        {'id': 'dio7' , 'name': 'DIO7', 'desc': 'Data I/O bit 7', 'idn':'dec_ieee488_opt_chan_dio7'},
+        {'id': 'dio8' , 'name': 'DIO8', 'desc': 'Data I/O bit 8', 'idn':'dec_ieee488_opt_chan_dio8'},
+        {'id': 'eoi', 'name': 'EOI', 'desc': 'End or identify', 'idn':'dec_ieee488_opt_chan_eoi'},
+        {'id': 'dav', 'name': 'DAV', 'desc': 'Data valid', 'idn':'dec_ieee488_opt_chan_dav'},
+        {'id': 'nrfd', 'name': 'NRFD', 'desc': 'Not ready for data', 'idn':'dec_ieee488_opt_chan_nrfd'},
+        {'id': 'ndac', 'name': 'NDAC', 'desc': 'Not data accepted', 'idn':'dec_ieee488_opt_chan_ndac'},
+        {'id': 'ifc', 'name': 'IFC', 'desc': 'Interface clear', 'idn':'dec_ieee488_opt_chan_ifc'},
+        {'id': 'srq', 'name': 'SRQ', 'desc': 'Service request', 'idn':'dec_ieee488_opt_chan_srq'},
+        {'id': 'atn', 'name': 'ATN', 'desc': 'Attention', 'idn':'dec_ieee488_opt_chan_atn'},
+        {'id': 'ren', 'name': 'REN', 'desc': 'Remote enable', 'idn':'dec_ieee488_opt_chan_ren'},
+        {'id': 'clk', 'name': 'CLK', 'desc': 'Serial clock', 'idn':'dec_ieee488_opt_chan_clk'},
     )
     options = (
         {'id': 'iec_periph', 'desc': 'Decode Commodore IEC bus peripherals details',
-            'default': 'no', 'values': ('no', 'yes')},
+            'default': 'no', 'values': ('no', 'yes'), 'idn':'dec_ieee488_opt_iec_periph'},
         {'id': 'delim', 'desc': 'Payload data delimiter',
-            'default': 'eol', 'values': ('none', 'eol')},
+            'default': 'eol', 'values': ('none', 'eol'), 'idn':'dec_ieee488_opt_delim'},
     )
     annotations = (
         ('bit', 'IEC bit'),
diff --git a/libsigrokdecode4DSL/decoders/ir_irmp/pd.py b/libsigrokdecode4DSL/decoders/ir_irmp/pd.py
index 979c1e01..d1a7016c 100644
--- a/libsigrokdecode4DSL/decoders/ir_irmp/pd.py
+++ b/libsigrokdecode4DSL/decoders/ir_irmp/pd.py
@@ -38,11 +38,11 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['IR']
     channels = (
-        {'id': 'ir', 'name': 'IR', 'desc': 'Data line'},
+        {'id': 'ir', 'name': 'IR', 'desc': 'Data line', 'idn':'dec_ir_irmp_chan_ir'},
     )
     options = (
         {'id': 'polarity', 'desc': 'Polarity', 'default': 'active-low',
-            'values': ('active-low', 'active-high')},
+            'values': ('active-low', 'active-high'), 'idn':'dec_ir_irmp_opt_polarity'},
     )
     annotations = (
         ('packet', 'Packet'),
diff --git a/libsigrokdecode4DSL/decoders/ir_nec/pd.py b/libsigrokdecode4DSL/decoders/ir_nec/pd.py
index 830892e8..3ed0ff87 100644
--- a/libsigrokdecode4DSL/decoders/ir_nec/pd.py
+++ b/libsigrokdecode4DSL/decoders/ir_nec/pd.py
@@ -35,12 +35,12 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['IR']
     channels = (
-        {'id': 'ir', 'name': 'IR', 'desc': 'Data line'},
+        {'id': 'ir', 'name': 'IR', 'desc': 'Data line', 'idn':'dec_ir_nec_chan_ir'},
     )
     options = (
         {'id': 'polarity', 'desc': 'Polarity', 'default': 'active-low',
-            'values': ('active-low', 'active-high')},
-        {'id': 'cd_freq', 'desc': 'Carrier Frequency', 'default': 0},
+            'values': ('active-low', 'active-high'), 'idn':'dec_ir_nec_opt_polarity'},
+        {'id': 'cd_freq', 'desc': 'Carrier Frequency', 'default': 0, 'idn':'dec_ir_nec_opt_cd_freq'},
     )
     annotations = (
         ('bit', 'Bit'),
diff --git a/libsigrokdecode4DSL/decoders/ir_rc5/pd.py b/libsigrokdecode4DSL/decoders/ir_rc5/pd.py
index e18a90bf..f1ea4171 100644
--- a/libsigrokdecode4DSL/decoders/ir_rc5/pd.py
+++ b/libsigrokdecode4DSL/decoders/ir_rc5/pd.py
@@ -34,13 +34,13 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['IR']
     channels = (
-        {'id': 'ir', 'name': 'IR', 'desc': 'IR data line'},
+        {'id': 'ir', 'name': 'IR', 'desc': 'IR data line', 'idn':'dec_ir_rc5_chan_ir'},
     )
     options = (
         {'id': 'polarity', 'desc': 'Polarity', 'default': 'active-low',
-            'values': ('active-low', 'active-high')},
+            'values': ('active-low', 'active-high'), 'idn':'dec_ir_rc5_opt_polarity'},
         {'id': 'protocol', 'desc': 'Protocol type', 'default': 'standard',
-            'values': ('standard', 'extended')},
+            'values': ('standard', 'extended'), 'idn':'dec_ir_rc5_opt_protocol'},
     )
     annotations = (
         ('bit', 'Bit'),
diff --git a/libsigrokdecode4DSL/decoders/ir_rc6/pd.py b/libsigrokdecode4DSL/decoders/ir_rc6/pd.py
index bd570173..6196c02b 100644
--- a/libsigrokdecode4DSL/decoders/ir_rc6/pd.py
+++ b/libsigrokdecode4DSL/decoders/ir_rc6/pd.py
@@ -33,11 +33,11 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['IR']
     channels = (
-        {'id': 'ir', 'name': 'IR', 'desc': 'IR data line'},
+        {'id': 'ir', 'name': 'IR', 'desc': 'IR data line', 'idn':'dec_ir_rc6_chan_ir'},
     )
     options = (
         {'id': 'polarity', 'desc': 'Polarity', 'default': 'auto',
-            'values': ('auto', 'active-low', 'active-high')},
+            'values': ('auto', 'active-low', 'active-high'), 'idn':'dec_ir_rc6_opt_polarity'},
     )
     annotations = (
         ('bit', 'Bit'),
diff --git a/libsigrokdecode4DSL/decoders/ir_sirc/pd.py b/libsigrokdecode4DSL/decoders/ir_sirc/pd.py
index 14ba63f0..fd5de785 100644
--- a/libsigrokdecode4DSL/decoders/ir_sirc/pd.py
+++ b/libsigrokdecode4DSL/decoders/ir_sirc/pd.py
@@ -49,11 +49,11 @@ class Decoder(srd.Decoder):
     inputs = ['logic']
     outputs = []
     channels = (
-        {'id': 'ir', 'name': 'IR', 'desc': 'IR data line'},
+        {'id': 'ir', 'name': 'IR', 'desc': 'IR data line', 'idn':'dec_ir_sirc_chan_ir'},
     )
     options = (
         {'id': 'polarity', 'desc': 'Polarity', 'default': 'active-low',
-            'values': ('active-low', 'active-high')},
+            'values': ('active-low', 'active-high'), 'idn':'dec_ir_sirc_opt_polarity'},
     )
     annotations = (
         ('bit', 'Bit'),
diff --git a/libsigrokdecode4DSL/decoders/jitter/pd.py b/libsigrokdecode4DSL/decoders/jitter/pd.py
index 8ea1aa67..8e96aec7 100644
--- a/libsigrokdecode4DSL/decoders/jitter/pd.py
+++ b/libsigrokdecode4DSL/decoders/jitter/pd.py
@@ -40,14 +40,14 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Clock/timing', 'Util']
     channels = (
-        {'id': 'clk', 'name': 'Clock', 'desc': 'Clock reference channel'},
-        {'id': 'sig', 'name': 'Resulting signal', 'desc': 'Resulting signal controlled by the clock'},
+        {'id': 'clk', 'name': 'Clock', 'desc': 'Clock reference channel', 'idn':'dec_jitter_chan_clk'},
+        {'id': 'sig', 'name': 'Resulting signal', 'desc': 'Resulting signal controlled by the clock', 'idn':'dec_jitter_chan_sig'},
     )
     options = (
         {'id': 'clk_polarity', 'desc': 'Clock edge polarity',
-            'default': 'rising', 'values': ('rising', 'falling', 'both')},
+            'default': 'rising', 'values': ('rising', 'falling', 'both'), 'idn':'dec_jitter_opt_clk_polarity'},
         {'id': 'sig_polarity', 'desc': 'Resulting signal edge polarity',
-            'default': 'rising', 'values': ('rising', 'falling', 'both')},
+            'default': 'rising', 'values': ('rising', 'falling', 'both'), 'idn':'dec_jitter_opt_sig_polarity'},
     )
     annotations = (
         ('jitter', 'Jitter value'),
diff --git a/libsigrokdecode4DSL/decoders/jtag/pd.py b/libsigrokdecode4DSL/decoders/jtag/pd.py
index e9c629b6..e84da2bd 100644
--- a/libsigrokdecode4DSL/decoders/jtag/pd.py
+++ b/libsigrokdecode4DSL/decoders/jtag/pd.py
@@ -73,15 +73,15 @@ class Decoder(srd.Decoder):
     outputs = ['jtag']
     tags = ['Debug/trace']
     channels = (
-        {'id': 'tdi',  'name': 'TDI',  'desc': 'Test data input'},
-        {'id': 'tdo',  'name': 'TDO',  'desc': 'Test data output'},
-        {'id': 'tck',  'name': 'TCK',  'desc': 'Test clock'},
-        {'id': 'tms',  'name': 'TMS',  'desc': 'Test mode select'},
+        {'id': 'tdi',  'name': 'TDI',  'desc': 'Test data input', 'idn':'dec_jtag_chan_tdi'},
+        {'id': 'tdo',  'name': 'TDO',  'desc': 'Test data output', 'idn':'dec_jtag_chan_tdo'},
+        {'id': 'tck',  'name': 'TCK',  'desc': 'Test clock', 'idn':'dec_jtag_chan_tck'},
+        {'id': 'tms',  'name': 'TMS',  'desc': 'Test mode select', 'idn':'dec_jtag_chan_tms'},
     )
     optional_channels = (
-        {'id': 'trst', 'name': 'TRST#', 'desc': 'Test reset'},
-        {'id': 'srst', 'name': 'SRST#', 'desc': 'System reset'},
-        {'id': 'rtck', 'name': 'RTCK',  'desc': 'Return clock signal'},
+        {'id': 'trst', 'name': 'TRST#', 'desc': 'Test reset', 'idn':'dec_jtag_opt_chan_trst'},
+        {'id': 'srst', 'name': 'SRST#', 'desc': 'System reset', 'idn':'dec_jtag_opt_chan_srst'},
+        {'id': 'rtck', 'name': 'RTCK',  'desc': 'Return clock signal', 'idn':'dec_jtag_opt_chan_rtck'},
     )
     annotations = tuple([tuple([s.lower(), s]) for s in jtag_states]) + ( \
         ('bit-tdi', 'Bit (TDI)'),
diff --git a/libsigrokdecode4DSL/decoders/lfast/pd.py b/libsigrokdecode4DSL/decoders/lfast/pd.py
index bd4c8ec4..0831402a 100644
--- a/libsigrokdecode4DSL/decoders/lfast/pd.py
+++ b/libsigrokdecode4DSL/decoders/lfast/pd.py
@@ -106,7 +106,7 @@ class Decoder(srd.Decoder):
     outputs = ['lfast']
     tags = ['Embedded/industrial']
     channels = (
-        {'id': 'data', 'name': 'Data', 'desc': 'TXP or RXP'},
+        {'id': 'data', 'name': 'Data', 'desc': 'TXP or RXP', 'idn':'dec_lfast_chan_data'},
     )
     annotations = (
         ('bit', 'Bits'),
diff --git a/libsigrokdecode4DSL/decoders/lin/pd.py b/libsigrokdecode4DSL/decoders/lin/pd.py
index a22be37d..4f6e4670 100644
--- a/libsigrokdecode4DSL/decoders/lin/pd.py
+++ b/libsigrokdecode4DSL/decoders/lin/pd.py
@@ -66,7 +66,7 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Automotive']
     options = (
-        {'id': 'version', 'desc': 'Protocol version', 'default': 2, 'values': (1, 2)},
+        {'id': 'version', 'desc': 'Protocol version', 'default': 2, 'values': (1, 2), 'idn':'dec_lin_opt_version'},
     )
     annotations = (
         ('data', 'LIN data'),
diff --git a/libsigrokdecode4DSL/decoders/lm75/pd.py b/libsigrokdecode4DSL/decoders/lm75/pd.py
index 14df1b52..bee4fb07 100644
--- a/libsigrokdecode4DSL/decoders/lm75/pd.py
+++ b/libsigrokdecode4DSL/decoders/lm75/pd.py
@@ -50,9 +50,9 @@ class Decoder(srd.Decoder):
     tags = ['Sensor']
     options = (
         {'id': 'sensor', 'desc': 'Sensor type', 'default': 'lm75',
-            'values': ('lm75',)},
+            'values': ('lm75',), 'idn':'dec_lm75_opt_sensor'},
         {'id': 'resolution', 'desc': 'Resolution (bits)', 'default': 9,
-            'values': (9, 10, 11, 12)},
+            'values': (9, 10, 11, 12), 'idn':'dec_lm75_opt_resolution'},
     )
     annotations = (
         ('celsius', 'Temperature in degrees Celsius'),
diff --git a/libsigrokdecode4DSL/decoders/lpc/pd.py b/libsigrokdecode4DSL/decoders/lpc/pd.py
index e92cbfd1..48fcae73 100644
--- a/libsigrokdecode4DSL/decoders/lpc/pd.py
+++ b/libsigrokdecode4DSL/decoders/lpc/pd.py
@@ -135,21 +135,21 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['PC']
     channels = (
-        {'id': 'lframe', 'name': 'LFRAME#', 'desc': 'Frame'},
-        {'id': 'lclk',   'name': 'LCLK',    'desc': 'Clock'},
-        {'id': 'lad0',   'name': 'LAD[0]',  'desc': 'Addr/control/data 0'},
-        {'id': 'lad1',   'name': 'LAD[1]',  'desc': 'Addr/control/data 1'},
-        {'id': 'lad2',   'name': 'LAD[2]',  'desc': 'Addr/control/data 2'},
-        {'id': 'lad3',   'name': 'LAD[3]',  'desc': 'Addr/control/data 3'},
+        {'id': 'lframe', 'name': 'LFRAME#', 'desc': 'Frame', 'idn':'dec_lpc_chan_lframe'},
+        {'id': 'lclk',   'name': 'LCLK',    'desc': 'Clock', 'idn':'dec_lpc_chan_lclk'},
+        {'id': 'lad0',   'name': 'LAD[0]',  'desc': 'Addr/control/data 0', 'idn':'dec_lpc_chan_lad0'},
+        {'id': 'lad1',   'name': 'LAD[1]',  'desc': 'Addr/control/data 1', 'idn':'dec_lpc_chan_lad1'},
+        {'id': 'lad2',   'name': 'LAD[2]',  'desc': 'Addr/control/data 2', 'idn':'dec_lpc_chan_lad2'},
+        {'id': 'lad3',   'name': 'LAD[3]',  'desc': 'Addr/control/data 3', 'idn':'dec_lpc_chan_lad3'},
     )
     optional_channels = (
-        {'id': 'lreset', 'name': 'LRESET#', 'desc': 'Reset'},
-        {'id': 'ldrq',   'name': 'LDRQ#',   'desc': 'Encoded DMA / bus master request'},
-        {'id': 'serirq', 'name': 'SERIRQ',  'desc': 'Serialized IRQ'},
-        {'id': 'clkrun', 'name': 'CLKRUN#', 'desc': 'Clock run'},
-        {'id': 'lpme',   'name': 'LPME#',   'desc': 'LPC power management event'},
-        {'id': 'lpcpd',  'name': 'LPCPD#',  'desc': 'Power down'},
-        {'id': 'lsmi',   'name': 'LSMI#',   'desc': 'System Management Interrupt'},
+        {'id': 'lreset', 'name': 'LRESET#', 'desc': 'Reset', 'idn':'dec_lpc_opt_chan_lreset'},
+        {'id': 'ldrq',   'name': 'LDRQ#',   'desc': 'Encoded DMA / bus master request', 'idn':'dec_lpc_opt_chan_ldrq'},
+        {'id': 'serirq', 'name': 'SERIRQ',  'desc': 'Serialized IRQ', 'idn':'dec_lpc_opt_chan_serirq'},
+        {'id': 'clkrun', 'name': 'CLKRUN#', 'desc': 'Clock run', 'idn':'dec_lpc_opt_chan_clkrun'},
+        {'id': 'lpme',   'name': 'LPME#',   'desc': 'LPC power management event', 'idn':'dec_lpc_opt_chan_lpme'},
+        {'id': 'lpcpd',  'name': 'LPCPD#',  'desc': 'Power down', 'idn':'dec_lpc_opt_chan_lpcpd'},
+        {'id': 'lsmi',   'name': 'LSMI#',   'desc': 'System Management Interrupt', 'idn':'dec_lpc_opt_chan_lsmi'},
     )
     annotations = (
         ('warnings', 'Warnings'),
diff --git a/libsigrokdecode4DSL/decoders/ltc242x/pd.py b/libsigrokdecode4DSL/decoders/ltc242x/pd.py
index 27ae5b99..92040002 100644
--- a/libsigrokdecode4DSL/decoders/ltc242x/pd.py
+++ b/libsigrokdecode4DSL/decoders/ltc242x/pd.py
@@ -40,7 +40,7 @@ class Decoder(srd.Decoder):
         ('ch1_voltages', 'CH1 voltages', (1,)),
     )
     options = (
-        {'id': 'vref', 'desc': 'Reference voltage (V)', 'default': 1.5},
+        {'id': 'vref', 'desc': 'Reference voltage (V)', 'default': 1.5, 'idn':'dec_ltc242x_opt_vref'},
     )
 
     def __init__(self):
diff --git a/libsigrokdecode4DSL/decoders/ltc26x7/pd.py b/libsigrokdecode4DSL/decoders/ltc26x7/pd.py
index 3255d5fd..083b6411 100644
--- a/libsigrokdecode4DSL/decoders/ltc26x7/pd.py
+++ b/libsigrokdecode4DSL/decoders/ltc26x7/pd.py
@@ -53,8 +53,8 @@ class Decoder(srd.Decoder):
     tags = ['IC', 'Analog/digital']
     options = (
         {'id': 'chip', 'desc': 'Chip', 'default': 'ltc2607',
-            'values': ('ltc2607', 'ltc2617', 'ltc2627')},
-        {'id': 'vref', 'desc': 'Reference voltage (V)', 'default': 1.5},
+            'values': ('ltc2607', 'ltc2617', 'ltc2627'), 'idn':'dec_ltc26x7_opt_chip'},
+        {'id': 'vref', 'desc': 'Reference voltage (V)', 'default': 1.5, 'idn':'dec_ltc26x7_opt_vref'},
     )
     annotations = (
         ('slave_addr', 'Slave address'),
diff --git a/libsigrokdecode4DSL/decoders/maple_bus/pd.py b/libsigrokdecode4DSL/decoders/maple_bus/pd.py
index 0e4e6043..94f27070 100644
--- a/libsigrokdecode4DSL/decoders/maple_bus/pd.py
+++ b/libsigrokdecode4DSL/decoders/maple_bus/pd.py
@@ -40,8 +40,8 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Retro computing']
     channels = (
-        {'id': 'sdcka', 'name': 'SDCKA', 'desc': 'Data/clock line A'},
-        {'id': 'sdckb', 'name': 'SDCKB', 'desc': 'Data/clock line B'},
+        {'id': 'sdcka', 'name': 'SDCKA', 'desc': 'Data/clock line A', 'idn':'dec_maple_bus_chan_sdcka'},
+        {'id': 'sdckb', 'name': 'SDCKB', 'desc': 'Data/clock line B', 'idn':'dec_maple_bus_chan_sdckb'},
     )
     annotations = (
         ('start', 'Start pattern'),
diff --git a/libsigrokdecode4DSL/decoders/mcs48/pd.py b/libsigrokdecode4DSL/decoders/mcs48/pd.py
index 50216a41..20af0e43 100644
--- a/libsigrokdecode4DSL/decoders/mcs48/pd.py
+++ b/libsigrokdecode4DSL/decoders/mcs48/pd.py
@@ -34,23 +34,26 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Retro computing']
     channels = (
-        {'id': 'ale', 'name': 'ALE', 'desc': 'Address latch enable'},
-        {'id': 'psen', 'name': '/PSEN', 'desc': 'Program store enable'},
+        {'id': 'ale', 'name': 'ALE', 'desc': 'Address latch enable', 'idn':'dec_mcs48_chan_ale'},
+        {'id': 'psen', 'name': '/PSEN', 'desc': 'Program store enable', 'idn':'dec_mcs48_chan_psen'},
     ) + tuple({
         'id': 'd%d' % i,
         'name': 'D%d' % i,
-        'desc': 'CPU data line %d' % i
+        'desc': 'CPU data line %d' % i, 
+        'idn':'dec_mcs48_chan_d%d' % i
         } for i in range(0, 8)
     ) + tuple({
         'id': 'a%d' % i,
         'name': 'A%d' % i,
-        'desc': 'CPU address line %d' % i
+        'desc': 'CPU address line %d' % i, 
+        'idn':'dec_mcs48_chan_a%d' % i
         } for i in range(8, 12)
     )
     optional_channels = tuple({
         'id': 'a%d' % i,
         'name': 'A%d' % i,
-        'desc': 'CPU address line %d' % i
+        'desc': 'CPU address line %d' % i, 
+        'idn':'dec_mcs48_opt_chan_a%d' % i
         } for i in range(12, 13)
     )
     annotations = (
diff --git a/libsigrokdecode4DSL/decoders/mdio/pd.py b/libsigrokdecode4DSL/decoders/mdio/pd.py
index 86e495f0..0e214a33 100644
--- a/libsigrokdecode4DSL/decoders/mdio/pd.py
+++ b/libsigrokdecode4DSL/decoders/mdio/pd.py
@@ -40,14 +40,14 @@ class Decoder(srd.Decoder):
     outputs = ['mdio']
     tags = ['Networking']
     channels = (
-        {'id': 'mdc', 'name': 'MDC', 'desc': 'Clock'},
-        {'id': 'mdio', 'name': 'MDIO', 'desc': 'Data'},
+        {'id': 'mdc', 'name': 'MDC', 'desc': 'Clock', 'idn':'dec_mdio_chan_mdc'},
+        {'id': 'mdio', 'name': 'MDIO', 'desc': 'Data', 'idn':'dec_mdio_chan_mdio'},
     )
     options = (
         {'id': 'show_debug_bits', 'desc': 'Show debug bits',
-            'default': 'no', 'values': ('yes', 'no')},
+            'default': 'no', 'values': ('yes', 'no'), 'idn':'dec_mdio_opt_show_debug_bits'},
         {'id': 'read_edge', 'desc': 'read edge',
-            'default': 'falling', 'values': ('rising', 'falling')},
+            'default': 'falling', 'values': ('rising', 'falling'), 'idn':'dec_mdio_opt_read_edge'},
     )
     annotations = (
         ('bit-val', 'Bit value'),
diff --git a/libsigrokdecode4DSL/decoders/microwire/pd.py b/libsigrokdecode4DSL/decoders/microwire/pd.py
index 47d87b85..79a4face 100644
--- a/libsigrokdecode4DSL/decoders/microwire/pd.py
+++ b/libsigrokdecode4DSL/decoders/microwire/pd.py
@@ -53,10 +53,10 @@ class Decoder(srd.Decoder):
     outputs = ['microwire']
     tags = ['Embedded/industrial']
     channels = (
-        {'id': 'cs', 'name': 'CS', 'desc': 'Chip select'},
-        {'id': 'sk', 'name': 'SK', 'desc': 'Clock'},
-        {'id': 'si', 'name': 'SI', 'desc': 'Slave in'},
-        {'id': 'so', 'name': 'SO', 'desc': 'Slave out'},
+        {'id': 'cs', 'name': 'CS', 'desc': 'Chip select', 'idn':'dec_microwire_chan_cs'},
+        {'id': 'sk', 'name': 'SK', 'desc': 'Clock', 'idn':'dec_microwire_chan_sk'},
+        {'id': 'si', 'name': 'SI', 'desc': 'Slave in', 'idn':'dec_microwire_chan_si'},
+        {'id': 'so', 'name': 'SO', 'desc': 'Slave out', 'idn':'dec_microwire_chan_so'},
     )
     annotations = (
         ('start-bit', 'Start bit'),
diff --git a/libsigrokdecode4DSL/decoders/miller/pd.py b/libsigrokdecode4DSL/decoders/miller/pd.py
index f41711f1..ce9ae839 100644
--- a/libsigrokdecode4DSL/decoders/miller/pd.py
+++ b/libsigrokdecode4DSL/decoders/miller/pd.py
@@ -41,11 +41,11 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Encoding']
     channels = (
-        {'id': 'data', 'name': 'Data', 'desc': 'Data signal'},
+        {'id': 'data', 'name': 'Data', 'desc': 'Data signal', 'idn':'dec_miller_chan_data'},
     )
     options = (
-        {'id': 'baudrate', 'desc': 'Baud rate', 'default': 106000},
-        {'id': 'edge', 'desc': 'Edge', 'default': 'falling', 'values': ('rising', 'falling', 'either')},
+        {'id': 'baudrate', 'desc': 'Baud rate', 'default': 106000, 'idn':'dec_miller_opt_baudrate'},
+        {'id': 'edge', 'desc': 'Edge', 'default': 'falling', 'values': ('rising', 'falling', 'either'), 'idn':'dec_miller_opt_edge'},
     )
     annotations = (
         ('bit', 'Bit'),
diff --git a/libsigrokdecode4DSL/decoders/mipi_dsi/pd.py b/libsigrokdecode4DSL/decoders/mipi_dsi/pd.py
index a7e1f71d..15b58dad 100644
--- a/libsigrokdecode4DSL/decoders/mipi_dsi/pd.py
+++ b/libsigrokdecode4DSL/decoders/mipi_dsi/pd.py
@@ -70,8 +70,8 @@ class Decoder(srd.Decoder):
     outputs = ['mipi_dsi']
     tags = ['Embedded/industrial']
     channels = (
-        {'id': 'D0N', 'type': 8, 'name': 'D0N', 'desc': 'LP data 0 neg'},
-        {'id': 'D0P', 'type': 108, 'name': 'D0P', 'desc': 'LP data 0 pos'},
+        {'id': 'D0N', 'type': 8, 'name': 'D0N', 'desc': 'LP data 0 neg', 'idn':'dec_mipi_dsi_chan_D0N'},
+        {'id': 'D0P', 'type': 108, 'name': 'D0P', 'desc': 'LP data 0 pos', 'idn':'dec_mipi_dsi_chan_D0P'},
     )
     options = (
 
diff --git a/libsigrokdecode4DSL/decoders/mipi_rffe/pd.py b/libsigrokdecode4DSL/decoders/mipi_rffe/pd.py
index a8673d03..2edbda1b 100644
--- a/libsigrokdecode4DSL/decoders/mipi_rffe/pd.py
+++ b/libsigrokdecode4DSL/decoders/mipi_rffe/pd.py
@@ -84,12 +84,12 @@ class Decoder(srd.Decoder):
     outputs = ['mipi_rffe']
     tags = ['Embedded/industrial']
     channels = (
-        {'id': 'sclk', 'type': 8, 'name': 'SCLK', 'desc': 'Serial clock line'},
-        {'id': 'sdata', 'type': 108, 'name': 'SDATA', 'desc': 'Serial data line'},
+        {'id': 'sclk', 'type': 8, 'name': 'SCLK', 'desc': 'Serial clock line', 'idn':'dec_mipi_rffe_chan_sclk'},
+        {'id': 'sdata', 'type': 108, 'name': 'SDATA', 'desc': 'Serial data line', 'idn':'dec_mipi_rffe_chan_sdata'},
     )
     options = (
-        {'id': 'error_display', 'desc': 'Error display options',
-            'default': 'display', 'values': ('display', 'not_display')},
+        {'id': 'error_display', 'desc': 'Error display options', 
+            'default': 'display', 'values': ('display', 'not_display'), 'idn':'dec_mipi_rffe_opt_error_display'},
     )
     annotations = (
         ('7', 'ssc', 'Sequence Start Condition'),
diff --git a/libsigrokdecode4DSL/decoders/modbus/pd.py b/libsigrokdecode4DSL/decoders/modbus/pd.py
index ce91269b..ec7aac65 100644
--- a/libsigrokdecode4DSL/decoders/modbus/pd.py
+++ b/libsigrokdecode4DSL/decoders/modbus/pd.py
@@ -845,7 +845,7 @@ class Decoder(srd.Decoder):
     )
     options = (
         {'id': 'channel', 'desc': 'Direction', 'default': 'TX',
-            'values': ('TX', 'RX')},
+            'values': ('TX', 'RX'), 'idn':'dec_modbus_opt_channel'},
     )
 
     def __init__(self):
diff --git a/libsigrokdecode4DSL/decoders/morse/pd.py b/libsigrokdecode4DSL/decoders/morse/pd.py
index 8b5cb829..330d64a8 100644
--- a/libsigrokdecode4DSL/decoders/morse/pd.py
+++ b/libsigrokdecode4DSL/decoders/morse/pd.py
@@ -123,10 +123,10 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Encoding']
     channels = (
-        {'id': 'data', 'name': 'Data', 'desc': 'Data line'},
+        {'id': 'data', 'name': 'Data', 'desc': 'Data line', 'idn':'dec_morse_chan_data'},
     )
     options = (
-        {'id': 'timeunit', 'desc': 'Time unit (guess)', 'default': 0.1},
+        {'id': 'timeunit', 'desc': 'Time unit (guess)', 'default': 0.1, 'idn':'dec_morse_opt_timeunit'},
     )
     annotations = (
         ('time', 'Time'),
diff --git a/libsigrokdecode4DSL/decoders/nes_gamepad/pd.py b/libsigrokdecode4DSL/decoders/nes_gamepad/pd.py
index b276e5db..b68e3ac0 100644
--- a/libsigrokdecode4DSL/decoders/nes_gamepad/pd.py
+++ b/libsigrokdecode4DSL/decoders/nes_gamepad/pd.py
@@ -33,7 +33,7 @@ class Decoder(srd.Decoder):
         # Currently only the standard controller is supported. This might be
         # extended by special controllers like the Nintendo Zapper light gun.
         {'id': 'variant', 'desc': 'Gamepad variant',
-            'default': 'Standard gamepad', 'values': ('Standard gamepad',)},
+            'default': 'Standard gamepad', 'values': ('Standard gamepad',), 'idn':'dec_nes_gamepad_opt_variant'},
     )
     annotations = (
         ('button', 'Button state'),
diff --git a/libsigrokdecode4DSL/decoders/nrf24l01/pd.py b/libsigrokdecode4DSL/decoders/nrf24l01/pd.py
index 7ac1b266..0078feec 100644
--- a/libsigrokdecode4DSL/decoders/nrf24l01/pd.py
+++ b/libsigrokdecode4DSL/decoders/nrf24l01/pd.py
@@ -73,7 +73,7 @@ class Decoder(srd.Decoder):
     tags = ['IC', 'Wireless/RF']
     options = (
         {'id': 'chip', 'desc': 'Chip type',
-            'default': 'nrf24l01', 'values': ('nrf24l01', 'xn297')},
+            'default': 'nrf24l01', 'values': ('nrf24l01', 'xn297'), 'idn':'dec_nrf24l01_opt_chip'},
     )
     annotations = (
         # Sent from the host to the chip.
diff --git a/libsigrokdecode4DSL/decoders/numbers_and_state/pd.py b/libsigrokdecode4DSL/decoders/numbers_and_state/pd.py
index 8680e563..7a610d90 100644
--- a/libsigrokdecode4DSL/decoders/numbers_and_state/pd.py
+++ b/libsigrokdecode4DSL/decoders/numbers_and_state/pd.py
@@ -90,7 +90,8 @@ class Ann:
 
 def _channel_decl(count):
     return tuple([
-        {'id': 'bit{}'.format(i), 'name': 'Bit{}'.format(i), 'desc': 'Bit position {}'.format(i)}
+        {'id': 'bit{}'.format(i), 'name': 'Bit{}'.format(i), 'desc': 'Bit position {}'.format(i), 
+        'idn':'dec_numbers_and_state_Bit{}'.format(i)}
         for i in range(count)
     ])
 
@@ -117,19 +118,19 @@ class Decoder(srd.Decoder):
     outputs = ['numbers_and_state']
     tags = ['Encoding', 'Util']
     optional_channels = (
-        {'id': 'clk', 'name': 'Clock', 'desc': 'Clock'},
+        {'id': 'clk', 'name': 'Clock', 'desc': 'Clock', 'idn':'dec_numbers_and_state_chan_clk'},
     ) + _channel_decl(_max_channels)
     options = (
         {'id': 'clkedge', 'desc': 'Clock edge', 'default': 'rising',
-            'values': ('rising', 'falling', 'either')},
-        {'id': 'count', 'desc': 'Total bits count', 'default': 0},
+            'values': ('rising', 'falling', 'either'), 'idn':'dec_numbers_and_state_opt_clkedge'},
+        {'id': 'count', 'desc': 'Total bits count', 'default': 0, 'idn':'dec_numbers_and_state_opt_count'},
         {'id': 'interp', 'desc': 'Interpretation', 'default': 'unsigned',
-            'values': ('unsigned', 'signed', 'fixpoint', 'fixsigned', 'ieee754', 'enum')},
-        {'id': 'fracbits', 'desc': 'Fraction bits count', 'default': 0},
+            'values': ('unsigned', 'signed', 'fixpoint', 'fixsigned', 'ieee754', 'enum'), 'idn':'dec_numbers_and_state_opt_interp'},
+        {'id': 'fracbits', 'desc': 'Fraction bits count', 'default': 0, 'idn':'dec_numbers_and_state_opt_fracbits'},
         {'id': 'mapping', 'desc': 'Enum to text map file',
-            'default': 'enumtext.json'},
+            'default': 'enumtext.json', 'idn':'dec_numbers_and_state_opt_mapping'},
         {'id': 'format', 'desc': 'Number format', 'default': '-',
-            'values': ('-', 'bin', 'oct', 'dec', 'hex')},
+            'values': ('-', 'bin', 'oct', 'dec', 'hex'), 'idn':'dec_numbers_and_state_opt_format'},
     )
     annotations = (
         ('raw', 'Raw pattern'),
diff --git a/libsigrokdecode4DSL/decoders/onewire_link/pd.py b/libsigrokdecode4DSL/decoders/onewire_link/pd.py
index 6592279e..b56e168c 100644
--- a/libsigrokdecode4DSL/decoders/onewire_link/pd.py
+++ b/libsigrokdecode4DSL/decoders/onewire_link/pd.py
@@ -99,11 +99,11 @@ class Decoder(srd.Decoder):
     outputs = ['onewire_link']
     tags = ['Embedded/industrial']
     channels = (
-        {'id': 'owr', 'name': 'OWR', 'desc': '1-Wire signal line'},
+        {'id': 'owr', 'name': 'OWR', 'desc': '1-Wire signal line', 'idn':'dec_onewire_link_chan_owr'},
     )
     options = (
         {'id': 'overdrive', 'desc': 'Start in overdrive speed',
-            'default': 'no', 'values': ('yes', 'no')},
+            'default': 'no', 'values': ('yes', 'no'), 'idn':'dec_onewire_link_opt_overdrive'},
     )
     annotations = (
         ('bit', 'Bit'),
diff --git a/libsigrokdecode4DSL/decoders/ook/pd.py b/libsigrokdecode4DSL/decoders/ook/pd.py
index 559291c4..2b983038 100644
--- a/libsigrokdecode4DSL/decoders/ook/pd.py
+++ b/libsigrokdecode4DSL/decoders/ook/pd.py
@@ -56,7 +56,7 @@ class Decoder(srd.Decoder):
     outputs = ['ook']
     tags = ['Encoding']
     channels = (
-        {'id': 'data', 'name': 'Data', 'desc': 'Data line'},
+        {'id': 'data', 'name': 'Data', 'desc': 'Data line', 'idn':'dec_ook_chan_data'},
     )
     annotations = (
         ('frame', 'Frame'),
diff --git a/libsigrokdecode4DSL/decoders/ook_oregon/pd.py b/libsigrokdecode4DSL/decoders/ook_oregon/pd.py
index 225f5983..d8b1327d 100644
--- a/libsigrokdecode4DSL/decoders/ook_oregon/pd.py
+++ b/libsigrokdecode4DSL/decoders/ook_oregon/pd.py
@@ -53,7 +53,7 @@ class Decoder(srd.Decoder):
     options = (
         {'id': 'unknown', 'desc': 'Unknown type is', 'default': 'Unknown',
          'values': ('Unknown', 'Temp', 'Temp_Hum', 'Temp_Hum1', 'Temp_Hum_Baro',
-                    'Temp_Hum_Baro1', 'UV', 'UV1', 'Wind', 'Rain', 'Rain1')},
+                    'Temp_Hum_Baro1', 'UV', 'UV1', 'Wind', 'Rain', 'Rain1'), 'idn':'dec_ook_oregon_opt_unknown'},
     )
 
     def __init__(self):
diff --git a/libsigrokdecode4DSL/decoders/ook_vis/pd.py b/libsigrokdecode4DSL/decoders/ook_vis/pd.py
index f985b96f..0193a506 100644
--- a/libsigrokdecode4DSL/decoders/ook_vis/pd.py
+++ b/libsigrokdecode4DSL/decoders/ook_vis/pd.py
@@ -50,15 +50,15 @@ class Decoder(srd.Decoder):
         {'id': 'displayas', 'desc': 'Display as', 'default': 'Nibble - Hex',
          'values': ('Byte - Hex', 'Byte - Hex rev', 'Byte - BCD',
          'Byte - BCD rev', 'Nibble - Hex', 'Nibble - Hex rev', 'Nibble - BCD',
-         'Nibble - BCD rev')},
+         'Nibble - BCD rev'), 'idn':'dec_ook_vis_opt_displayas'},
         {'id': 'synclen', 'desc': 'Sync length', 'default': '4',
-         'values': ('0', '1', '2', '3', '4', '5', '6', '7', '8', '9', '10')},
+         'values': ('0', '1', '2', '3', '4', '5', '6', '7', '8', '9', '10'), 'idn':'dec_ook_vis_opt_synclen'},
         {'id': 'syncoffset', 'desc': 'Sync offset', 'default': '0',
-         'values': ('-4', '-3', '-2', '-1', '0', '1', '2', '3', '4')},
+         'values': ('-4', '-3', '-2', '-1', '0', '1', '2', '3', '4'), 'idn':'dec_ook_vis_opt_syncoffset'},
         {'id': 'refsample', 'desc': 'Compare', 'default': 'off', 'values':
         ('off', 'show numbers', '1', '2', '3', '4', '5', '6', '7', '8', '9',
          '10', '11', '12', '13', '14', '15', '16', '17', '18', '19', '20',
-         '21', '22', '23', '24', '25', '26', '27', '28', '29', '30')},
+         '21', '22', '23', '24', '25', '26', '27', '28', '29', '30'), 'idn':'dec_ook_vis_opt_refsample'},
     )
 
     def __init__(self):
diff --git a/libsigrokdecode4DSL/decoders/parallel/pd.py b/libsigrokdecode4DSL/decoders/parallel/pd.py
index dba46e12..5649f0f1 100644
--- a/libsigrokdecode4DSL/decoders/parallel/pd.py
+++ b/libsigrokdecode4DSL/decoders/parallel/pd.py
@@ -79,11 +79,11 @@ class Decoder(srd.Decoder):
     optional_channels = channel_list(NUM_CHANNELS)
     options = (
         {'id': 'clock_edge', 'desc': 'Clock edge to sample on',
-            'default': 'rising', 'values': ('rising', 'falling')},
+            'default': 'rising', 'values': ('rising', 'falling'), 'idn':'dec_parallel_opt_clock_edge'},
         {'id': 'wordsize', 'desc': 'Data wordsize (# bus cycles)',
-            'default': 0},
+            'default': 0, 'idn':'dec_parallel_opt_wordsize'},
         {'id': 'endianness', 'desc': 'Data endianness',
-            'default': 'little', 'values': ('little', 'big')},
+            'default': 'little', 'values': ('little', 'big'), 'idn':'dec_parallel_opt_endianness'},
     )
     annotations = (
         ('items', 'Items'),
diff --git a/libsigrokdecode4DSL/decoders/pjdl/pd.py b/libsigrokdecode4DSL/decoders/pjdl/pd.py
index b6adfe17..e054730f 100644
--- a/libsigrokdecode4DSL/decoders/pjdl/pd.py
+++ b/libsigrokdecode4DSL/decoders/pjdl/pd.py
@@ -122,12 +122,12 @@ class Decoder(srd.Decoder):
     outputs = ['pjon_link']
     tags = ['Embedded/industrial']
     channels = (
-        {'id': 'data' , 'name': 'DATA', 'desc': 'Single wire data'},
+        {'id': 'data' , 'name': 'DATA', 'desc': 'Single wire data', 'idn':'dec_pjdl_chan_data'},
     )
     options = (
         {'id': 'mode', 'desc': 'Communication mode',
-            'default': 1, 'values': (1, 2, 3, 4)},
-        {'id': 'idle_add_us', 'desc': 'Added idle time (us)', 'default': 4},
+            'default': 1, 'values': (1, 2, 3, 4), 'idn':'dec_pjdl_opt_mode'},
+        {'id': 'idle_add_us', 'desc': 'Added idle time (us)', 'default': 4, 'idn':'dec_pjdl_opt_idle_add_us'},
     )
     annotations = (
         ('cs_busy', 'Carrier busy'),
diff --git a/libsigrokdecode4DSL/decoders/ps2/pd.py b/libsigrokdecode4DSL/decoders/ps2/pd.py
index fc6972bb..7dfb6a20 100644
--- a/libsigrokdecode4DSL/decoders/ps2/pd.py
+++ b/libsigrokdecode4DSL/decoders/ps2/pd.py
@@ -37,14 +37,14 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['PC']
     channels = (
-        {'id': 'clk', 'type': 0, 'name': 'Clock', 'desc': 'Clock line'},
-        {'id': 'data', 'type': 107, 'name': 'Data', 'desc': 'Data line'},
+        {'id': 'clk', 'type': 0, 'name': 'Clock', 'desc': 'Clock line', 'idn':'dec_ps2_chan_clk'},
+        {'id': 'data', 'type': 107, 'name': 'Data', 'desc': 'Data line', 'idn':'dec_ps2_chan_data'},
     )
     options = (
         {'id': 'HtoD_Clock', 'desc': 'HtoD_Clock',
-            'default': 'rise', 'values': ('rise', 'fall')},
+            'default': 'rise', 'values': ('rise', 'fall'), 'idn':'dec_ps2_opt_HtoD_Clock'},
         {'id': 'DtoH_Clock', 'desc': 'DtoH_Clock',
-            'default': 'fall', 'values': ('fall', 'rise')},
+            'default': 'fall', 'values': ('fall', 'rise'), 'idn':'dec_ps2_opt_DtoH_Clock'},
     )
     annotations = (
         ('207', 'bit', 'Bit'),
diff --git a/libsigrokdecode4DSL/decoders/pwm/pd.py b/libsigrokdecode4DSL/decoders/pwm/pd.py
index d8626ee0..9a1d95f9 100644
--- a/libsigrokdecode4DSL/decoders/pwm/pd.py
+++ b/libsigrokdecode4DSL/decoders/pwm/pd.py
@@ -34,11 +34,11 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Encoding']
     channels = (
-        {'id': 'data', 'name': 'Data', 'desc': 'Data line'},
+        {'id': 'data', 'name': 'Data', 'desc': 'Data line', 'idn':'dec_pwm_chan_data'},
     )
     options = (
         {'id': 'polarity', 'desc': 'Polarity', 'default': 'active-high',
-            'values': ('active-low', 'active-high')},
+            'values': ('active-low', 'active-high'), 'idn':'dec_pwm_opt_polarity'},
     )
     annotations = (
         ('duty-cycle', 'Duty cycle'),
diff --git a/libsigrokdecode4DSL/decoders/pxx1/pd.py b/libsigrokdecode4DSL/decoders/pxx1/pd.py
index a230f44e..4ae07661 100644
--- a/libsigrokdecode4DSL/decoders/pxx1/pd.py
+++ b/libsigrokdecode4DSL/decoders/pxx1/pd.py
@@ -32,7 +32,7 @@ class Decoder(srd.Decoder):
 	outputs = []
 	tags = ['PXX1']
 	channels = (
-		{'id': 'data', 'name': 'Data', 'desc': 'Data line'},
+		{'id': 'data', 'name': 'Data', 'desc': 'Data line', 'idn':'dec_pxx1_chan_data'},
 	)
 	options = ()
 
diff --git a/libsigrokdecode4DSL/decoders/qi/pd.py b/libsigrokdecode4DSL/decoders/qi/pd.py
index b750d9ce..8effd1b2 100644
--- a/libsigrokdecode4DSL/decoders/qi/pd.py
+++ b/libsigrokdecode4DSL/decoders/qi/pd.py
@@ -55,7 +55,7 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Embedded/industrial', 'Wireless/RF']
     channels = (
-        {'id': 'qi', 'name': 'Qi', 'desc': 'Demodulated Qi data line'},
+        {'id': 'qi', 'name': 'Qi', 'desc': 'Demodulated Qi data line', 'idn':'dec_qi_chan_qi'},
     )
     annotations = (
         ('bits', 'Bits'),
diff --git a/libsigrokdecode4DSL/decoders/qspi/pd.py b/libsigrokdecode4DSL/decoders/qspi/pd.py
index e0aa4f2a..2723842b 100644
--- a/libsigrokdecode4DSL/decoders/qspi/pd.py
+++ b/libsigrokdecode4DSL/decoders/qspi/pd.py
@@ -47,25 +47,25 @@ class Decoder(srd.Decoder):
     outputs = ['spi']
     tags = ['Embedded/industrial']
     channels = (
-        {'id': 'clk', 'type': 0, 'name': 'CLK', 'desc': 'Clock'},
-        {'id': 'io0', 'type': 107, 'name': 'IO0', 'desc': 'Data i/o 0'},
+        {'id': 'clk', 'type': 0, 'name': 'CLK', 'desc': 'Clock', 'idn':'dec_qspi_chan_clk'},
+        {'id': 'io0', 'type': 107, 'name': 'IO0', 'desc': 'Data i/o 0', 'idn':'dec_qspi_chan_io0'},
     )
     optional_channels = (
-        {'id': 'io1', 'type': 107, 'name': 'IO1', 'desc': 'Data i/o 1'},
-        {'id': 'io2', 'type': 107, 'name': 'IO2', 'desc': 'Data i/o 2'},
-        {'id': 'io3', 'type': 107, 'name': 'IO3', 'desc': 'Data i/o 3'},
-        {'id': 'cs', 'type': -1, 'name': 'CS#', 'desc': 'Chip-select'},
+        {'id': 'io1', 'type': 107, 'name': 'IO1', 'desc': 'Data i/o 1', 'idn':'dec_qspi_opt_chan_io1'},
+        {'id': 'io2', 'type': 107, 'name': 'IO2', 'desc': 'Data i/o 2', 'idn':'dec_qspi_opt_chan_io2'},
+        {'id': 'io3', 'type': 107, 'name': 'IO3', 'desc': 'Data i/o 3', 'idn':'dec_qspi_opt_chan_io3'},
+        {'id': 'cs', 'type': -1, 'name': 'CS#', 'desc': 'Chip-select', 'idn':'dec_qspi_opt_chan_cs'},
     )
     options = (
         {'id': 'cs_polarity', 'desc': 'CS# polarity', 'default': 'active-low',
-            'values': ('active-low', 'active-high')},
+            'values': ('active-low', 'active-high'), 'idn':'dec_qspi_opt_cs_polarity'},
         {'id': 'cpol', 'desc': 'Clock polarity (CPOL)', 'default': 0,
-            'values': (0, 1)},
+            'values': (0, 1), 'idn':'dec_qspi_opt_cpol'},
         {'id': 'cpha', 'desc': 'Clock phase (CPHA)', 'default': 0,
-            'values': (0, 1)},
+            'values': (0, 1), 'idn':'dec_qspi_opt_cpha'},
         {'id': 'bitorder', 'desc': 'Bit order',
-            'default': 'msb-first', 'values': ('msb-first', 'lsb-first')},
-        {'id': 'wordsize', 'desc': 'Word size', 'default': 8},
+            'default': 'msb-first', 'values': ('msb-first', 'lsb-first'), 'idn':'dec_qspi_opt_bitorder'},
+        {'id': 'wordsize', 'desc': 'Word size', 'default': 8, 'idn':'dec_qspi_opt_wordsize'},
     )
     annotations = (
         ('106', 'data', 'data'),
diff --git a/libsigrokdecode4DSL/decoders/rc_encode/pd.py b/libsigrokdecode4DSL/decoders/rc_encode/pd.py
index daeca092..bfa30de5 100644
--- a/libsigrokdecode4DSL/decoders/rc_encode/pd.py
+++ b/libsigrokdecode4DSL/decoders/rc_encode/pd.py
@@ -82,7 +82,7 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['IC', 'IR']
     channels = (
-        {'id': 'data', 'name': 'Data', 'desc': 'Data line'},
+        {'id': 'data', 'name': 'Data', 'desc': 'Data line', 'idn':'dec_rc_encode_chan_data'},
     )
     annotations = (
         ('bit-0', 'Bit 0'),
diff --git a/libsigrokdecode4DSL/decoders/rgb_led_ws281x/pd.py b/libsigrokdecode4DSL/decoders/rgb_led_ws281x/pd.py
index 0ea283ea..aa23cace 100644
--- a/libsigrokdecode4DSL/decoders/rgb_led_ws281x/pd.py
+++ b/libsigrokdecode4DSL/decoders/rgb_led_ws281x/pd.py
@@ -36,13 +36,14 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Display', 'IC']
     channels = (
-        {'id': 'din', 'name': 'DIN', 'desc': 'DIN data line'},
+        {'id': 'din', 'name': 'DIN', 'desc': 'DIN data line', 'idn':'dec_rgb_led_ws281x_chan_din'},
     )
     options = (
         {'id': 'colors', 'desc': 'Colors', 'default': 'GRB',
-            'values': ( 'GRB', 'RGB', 'BRG', 'RBG', 'BGR', 'GRBW', 'RGBW', 'WRGB', 'LBGR', 'LGRB', 'LRGB', 'LRBG', 'LGBR', 'LBRG')},
+            'values': ( 'GRB', 'RGB', 'BRG', 'RBG', 'BGR', 'GRBW', 'RGBW', 'WRGB', 'LBGR', 'LGRB', 'LRGB', 'LRBG', 'LGBR', 'LBRG')
+            , 'idn':'dec_rgb_led_ws281x_opt_colors'},
         {'id': 'polarity', 'desc': 'Polarity', 'default': 'normal',
-            'values': ('normal', 'inverted')},
+            'values': ('normal', 'inverted'), 'idn':'dec_rgb_led_ws281x_opt_polarity'},
     )
     annotations = (
         ('bit', 'Bit'),
diff --git a/libsigrokdecode4DSL/decoders/sae_j1850_vpw/pd.py b/libsigrokdecode4DSL/decoders/sae_j1850_vpw/pd.py
index fd2389ec..bd215ee4 100644
--- a/libsigrokdecode4DSL/decoders/sae_j1850_vpw/pd.py
+++ b/libsigrokdecode4DSL/decoders/sae_j1850_vpw/pd.py
@@ -40,7 +40,7 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Automotive']
     channels = (
-        {'id': 'data', 'name': 'Data', 'desc': 'Data line'},
+        {'id': 'data', 'name': 'Data', 'desc': 'Data line', 'idn':'dec_sae_j1850_vpw_chan_data'},
     )
     annotations = (
         ('raw', 'Raw'),
diff --git a/libsigrokdecode4DSL/decoders/sda2506/pd.py b/libsigrokdecode4DSL/decoders/sda2506/pd.py
index 813bff6a..8c28906d 100644
--- a/libsigrokdecode4DSL/decoders/sda2506/pd.py
+++ b/libsigrokdecode4DSL/decoders/sda2506/pd.py
@@ -34,9 +34,9 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['IC', 'Memory']
     channels = (
-        {'id': 'clk', 'name': 'CLK', 'desc': 'Clock'},
-        {'id': 'd', 'name': 'DATA', 'desc': 'Data'},
-        {'id': 'ce', 'name': 'CE#', 'desc': 'Chip-enable'},
+        {'id': 'clk', 'name': 'CLK', 'desc': 'Clock', 'idn':'dec_sda2506_chan_clk'},
+        {'id': 'd', 'name': 'DATA', 'desc': 'Data', 'idn':'dec_sda2506_chan_d'},
+        {'id': 'ce', 'name': 'CE#', 'desc': 'Chip-enable', 'idn':'dec_sda2506_chan_ce'},
     )
     annotations = (
         ('cmdbit', 'Command bit'),
diff --git a/libsigrokdecode4DSL/decoders/sdcard_sd/pd.py b/libsigrokdecode4DSL/decoders/sdcard_sd/pd.py
index 292d0a6c..640c956a 100644
--- a/libsigrokdecode4DSL/decoders/sdcard_sd/pd.py
+++ b/libsigrokdecode4DSL/decoders/sdcard_sd/pd.py
@@ -70,14 +70,14 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Memory']
     channels = (
-        {'id': 'cmd',  'name': 'CMD',  'desc': 'Command'},
-        {'id': 'clk',  'name': 'CLK',  'desc': 'Clock'},
+        {'id': 'cmd',  'name': 'CMD',  'desc': 'Command', 'idn':'dec_sdcard_sd_chan_cmd'},
+        {'id': 'clk',  'name': 'CLK',  'desc': 'Clock', 'idn':'dec_sdcard_sd_chan_clk'},
     )
     optional_channels = (
-        {'id': 'dat0', 'name': 'DAT0', 'desc': 'Data pin 0'},
-        {'id': 'dat1', 'name': 'DAT1', 'desc': 'Data pin 1'},
-        {'id': 'dat2', 'name': 'DAT2', 'desc': 'Data pin 2'},
-        {'id': 'dat3', 'name': 'DAT3', 'desc': 'Data pin 3'},
+        {'id': 'dat0', 'name': 'DAT0', 'desc': 'Data pin 0', 'idn':'dec_sdcard_sd_opt_chan_dat0'},
+        {'id': 'dat1', 'name': 'DAT1', 'desc': 'Data pin 1', 'idn':'dec_sdcard_sd_opt_chan_dat1'},
+        {'id': 'dat2', 'name': 'DAT2', 'desc': 'Data pin 2', 'idn':'dec_sdcard_sd_opt_chan_dat2'},
+        {'id': 'dat3', 'name': 'DAT3', 'desc': 'Data pin 3', 'idn':'dec_sdcard_sd_opt_chan_dat3'},
     )
     annotations = \
         tuple(('cmd%d' % i, 'CMD%d' % i) for i in range(64)) + \
diff --git a/libsigrokdecode4DSL/decoders/sdq/pd.py b/libsigrokdecode4DSL/decoders/sdq/pd.py
index 66df4202..864147f6 100644
--- a/libsigrokdecode4DSL/decoders/sdq/pd.py
+++ b/libsigrokdecode4DSL/decoders/sdq/pd.py
@@ -40,10 +40,10 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Embedded/industrial']
     channels = (
-        {'id': 'sdq', 'name': 'SDQ', 'desc': 'Single wire SDQ data line.'},
+        {'id': 'sdq', 'name': 'SDQ', 'desc': 'Single wire SDQ data line.', 'idn':'dec_sdq_chan_sdq'},
     )
     options = (
-        {'id': 'bitrate', 'desc': 'Bit rate', 'default': 98425},
+        {'id': 'bitrate', 'desc': 'Bit rate', 'default': 98425, 'idn':'dec_sdq_opt_bitrate'},
     )
     annotations = (
         ('bit', 'Bit'),
diff --git a/libsigrokdecode4DSL/decoders/seven_segment/pd.py b/libsigrokdecode4DSL/decoders/seven_segment/pd.py
index edabf04a..731f430b 100644
--- a/libsigrokdecode4DSL/decoders/seven_segment/pd.py
+++ b/libsigrokdecode4DSL/decoders/seven_segment/pd.py
@@ -53,20 +53,20 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Display']
     channels = (
-        {'id': 'a', 'name': 'A', 'desc': 'Segment A'},
-        {'id': 'b', 'name': 'B', 'desc': 'Segment B'},
-        {'id': 'c', 'name': 'C', 'desc': 'Segment C'},
-        {'id': 'd', 'name': 'D', 'desc': 'Segment D'},
-        {'id': 'e', 'name': 'E', 'desc': 'Segment E'},
-        {'id': 'f', 'name': 'F', 'desc': 'Segment F'},
-        {'id': 'g', 'name': 'G', 'desc': 'Segment G'},
+        {'id': 'a', 'name': 'A', 'desc': 'Segment A', 'idn':'dec_seven_segment_chan_A'},
+        {'id': 'b', 'name': 'B', 'desc': 'Segment B', 'idn':'dec_seven_segment_chan_B'},
+        {'id': 'c', 'name': 'C', 'desc': 'Segment C', 'idn':'dec_seven_segment_chan_C'},
+        {'id': 'd', 'name': 'D', 'desc': 'Segment D', 'idn':'dec_seven_segment_chan_D'},
+        {'id': 'e', 'name': 'E', 'desc': 'Segment E', 'idn':'dec_seven_segment_chan_E'},
+        {'id': 'f', 'name': 'F', 'desc': 'Segment F', 'idn':'dec_seven_segment_chan_F'},
+        {'id': 'g', 'name': 'G', 'desc': 'Segment G', 'idn':'dec_seven_segment_chan_G'},
     )
     optional_channels = (
-        {'id': 'dp', 'name': 'DP', 'desc': 'Decimal point'},
+        {'id': 'dp', 'name': 'DP', 'desc': 'Decimal point', 'idn':'dec_seven_segment_opt_chan_dp'},
     )
     options = (
         {'id': 'polarity', 'desc': 'Expected polarity',
-            'default': 'common-cathode', 'values': ('common-cathode', 'common-anode')},
+            'default': 'common-cathode', 'values': ('common-cathode', 'common-anode'), 'idn':'dec_seven_segment_opt_polarity'},
     )
     annotations = (
         ('decoded-digit', 'Decoded digit'),
diff --git a/libsigrokdecode4DSL/decoders/signature/pd.py b/libsigrokdecode4DSL/decoders/signature/pd.py
index 946b2da7..6d6253a4 100644
--- a/libsigrokdecode4DSL/decoders/signature/pd.py
+++ b/libsigrokdecode4DSL/decoders/signature/pd.py
@@ -51,20 +51,20 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Debug/trace', 'Util', 'Encoding']
     channels = (
-        {'id': 'start', 'name': 'START', 'desc': 'START channel'},
-        {'id': 'stop', 'name': 'STOP', 'desc': 'STOP channel'},
-        {'id': 'clk', 'name': 'CLOCK', 'desc': 'CLOCK channel'},
-        {'id': 'data', 'name': 'DATA', 'desc': 'DATA channel'},
+        {'id': 'start', 'name': 'START', 'desc': 'START channel', 'idn':'dec_signature_chan_start'},
+        {'id': 'stop', 'name': 'STOP', 'desc': 'STOP channel', 'idn':'dec_signature_chan_stop'},
+        {'id': 'clk', 'name': 'CLOCK', 'desc': 'CLOCK channel', 'idn':'dec_signature_chan_clk'},
+        {'id': 'data', 'name': 'DATA', 'desc': 'DATA channel', 'idn':'dec_signature_chan_data'},
     )
     options = (
         {'id': 'start_edge', 'desc': 'START edge polarity',
-            'default': 'rising', 'values': ('rising', 'falling')},
+            'default': 'rising', 'values': ('rising', 'falling'), 'idn':'dec_signature_opt_start_edge'},
         {'id': 'stop_edge', 'desc': 'STOP edge polarity',
-            'default': 'rising', 'values': ('rising', 'falling')},
+            'default': 'rising', 'values': ('rising', 'falling'), 'idn':'dec_signature_opt_stop_edge'},
         {'id': 'clk_edge', 'desc': 'CLOCK edge polarity',
-            'default': 'falling', 'values': ('rising', 'falling')},
+            'default': 'falling', 'values': ('rising', 'falling'), 'idn':'dec_signature_opt_clk_edge'},
         {'id': 'annbits', 'desc': 'Enable bit level annotations',
-            'default': 'no', 'values': ('yes', 'no')},
+            'default': 'no', 'values': ('yes', 'no'), 'idn':'dec_signature_opt_annbits'},
     )
     annotations = (
         ('bit0', 'Bit0'),
diff --git a/libsigrokdecode4DSL/decoders/sle44xx/pd.py b/libsigrokdecode4DSL/decoders/sle44xx/pd.py
index 92842b3b..6656cede 100644
--- a/libsigrokdecode4DSL/decoders/sle44xx/pd.py
+++ b/libsigrokdecode4DSL/decoders/sle44xx/pd.py
@@ -43,9 +43,9 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Memory']
     channels = (
-        {'id': 'rst', 'name': 'RST', 'desc': 'Reset line'},
-        {'id': 'clk', 'name': 'CLK', 'desc': 'Clock line'},
-        {'id': 'io', 'name': 'I/O', 'desc': 'I/O data line'},
+        {'id': 'rst', 'name': 'RST', 'desc': 'Reset line', 'idn':'dec_sle44xx_chan_rst'},
+        {'id': 'clk', 'name': 'CLK', 'desc': 'Clock line', 'idn':'dec_sle44xx_chan_clk'},
+        {'id': 'io', 'name': 'I/O', 'desc': 'I/O data line', 'idn':'dec_sle44xx_chan_io'},
     )
     annotations = (
         ('reset_sym', 'Reset Symbol'),
diff --git a/libsigrokdecode4DSL/decoders/spdif/pd.py b/libsigrokdecode4DSL/decoders/spdif/pd.py
index 532bf825..e9232492 100644
--- a/libsigrokdecode4DSL/decoders/spdif/pd.py
+++ b/libsigrokdecode4DSL/decoders/spdif/pd.py
@@ -33,7 +33,7 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Audio', 'PC']
     channels = (
-        {'id': 'data', 'name': 'Data', 'desc': 'Data line'},
+        {'id': 'data', 'name': 'Data', 'desc': 'Data line', 'idn':'dec_spdif_chan_data'},
     )
     annotations = (
         ('bitrate', 'Bitrate / baudrate'),
diff --git a/libsigrokdecode4DSL/decoders/spi_tpm/pd.py b/libsigrokdecode4DSL/decoders/spi_tpm/pd.py
index d4cd081b..5b311b8a 100644
--- a/libsigrokdecode4DSL/decoders/spi_tpm/pd.py
+++ b/libsigrokdecode4DSL/decoders/spi_tpm/pd.py
@@ -135,7 +135,7 @@ class Decoder(srd.Decoder):
     )
     options = (
         {'id': 'tpm_version', 'desc': 'TPM Version 1.2 or 2.0', 'default': '2.0',
-         'values': ('2.0', '1.2')},
+         'values': ('2.0', '1.2'), 'idn':'dec_spi_tpm_opt_tpm_version'},
     )
 
     def __init__(self):
diff --git a/libsigrokdecode4DSL/decoders/spiflash/pd.py b/libsigrokdecode4DSL/decoders/spiflash/pd.py
index c4090ca5..a7d605f9 100644
--- a/libsigrokdecode4DSL/decoders/spiflash/pd.py
+++ b/libsigrokdecode4DSL/decoders/spiflash/pd.py
@@ -93,9 +93,9 @@ class Decoder(srd.Decoder):
     )
     options = (
         {'id': 'chip', 'desc': 'Chip', 'default': tuple(chips.keys())[0],
-            'values': tuple(chips.keys())},
+            'values': tuple(chips.keys()), 'idn':'dec_spiflash_opt_chip'},
         {'id': 'format', 'desc': 'Data format', 'default': 'hex',
-            'values': ('hex', 'ascii')},
+            'values': ('hex', 'ascii'), 'idn':'dec_spiflash_opt_format'},
     )
 
     def __init__(self):
diff --git a/libsigrokdecode4DSL/decoders/ssi32/pd.py b/libsigrokdecode4DSL/decoders/ssi32/pd.py
index 51608039..726e646e 100644
--- a/libsigrokdecode4DSL/decoders/ssi32/pd.py
+++ b/libsigrokdecode4DSL/decoders/ssi32/pd.py
@@ -33,7 +33,7 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Embedded/industrial']
     options = (
-        {'id': 'msgsize', 'desc': 'Message size', 'default': 64},
+        {'id': 'msgsize', 'desc': 'Message size', 'default': 64, 'idn':'dec_ssi32_opt_msgsize'},
     )
     annotations = (
         ('ctrl-tx', 'CTRL TX'),
diff --git a/libsigrokdecode4DSL/decoders/st7735/pd.py b/libsigrokdecode4DSL/decoders/st7735/pd.py
index 252b1887..4bee2217 100644
--- a/libsigrokdecode4DSL/decoders/st7735/pd.py
+++ b/libsigrokdecode4DSL/decoders/st7735/pd.py
@@ -75,10 +75,10 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Display', 'IC']
     channels = (
-        {'id': 'cs', 'name': 'CS#', 'desc': 'Chip-select'},
-        {'id': 'clk', 'name': 'CLK', 'desc': 'Clock'},
-        {'id': 'mosi', 'name': 'MOSI', 'desc': 'Master out, slave in'},
-        {'id': 'dc', 'name': 'DC', 'desc': 'Data or command'}
+        {'id': 'cs', 'name': 'CS#', 'desc': 'Chip-select', 'idn':'dec_st7735_chan_cs'},
+        {'id': 'clk', 'name': 'CLK', 'desc': 'Clock', 'idn':'dec_st7735_chan_clk'},
+        {'id': 'mosi', 'name': 'MOSI', 'desc': 'Master out, slave in', 'idn':'dec_st7735_chan_mosi'},
+        {'id': 'dc', 'name': 'DC', 'desc': 'Data or command', 'idn':'dec_st7735_chan_dc'}
     )
     annotations = (
         ('bit', 'Bit'),
diff --git a/libsigrokdecode4DSL/decoders/st7789/pd.py b/libsigrokdecode4DSL/decoders/st7789/pd.py
index b8141ac7..019f6268 100644
--- a/libsigrokdecode4DSL/decoders/st7789/pd.py
+++ b/libsigrokdecode4DSL/decoders/st7789/pd.py
@@ -113,10 +113,10 @@ class Decoder(srd.Decoder):
     inputs = ["logic"]
     outputs = []
     channels = (
-        {"id": "csx", "name": "CSX", "desc": "Chip selection signal"},
-        {"id": "dcx", "name": "DCX", "desc": "Clock signal"},
-        {"id": "sdo", "name": "SDO", "desc": "Serial output data"},
-        {"id": "wrx", "name": "WRX", "desc": "Command / data"},
+        {"id": "csx", "name": "CSX", "desc": "Chip selection signal", 'idn':'dec_st7789_chan_csx'},
+        {"id": "dcx", "name": "DCX", "desc": "Clock signal", 'idn':'dec_st7789_chan_dcx'},
+        {"id": "sdo", "name": "SDO", "desc": "Serial output data", 'idn':'dec_st7789_chan_sdo'},
+        {"id": "wrx", "name": "WRX", "desc": "Command / data", 'idn':'dec_st7789_chan_wrx'},
     )
     optional_channels = tuple()
     tags = ["Display", "SPI"]
diff --git a/libsigrokdecode4DSL/decoders/stepper_motor/pd.py b/libsigrokdecode4DSL/decoders/stepper_motor/pd.py
index 2a7009a0..07803438 100644
--- a/libsigrokdecode4DSL/decoders/stepper_motor/pd.py
+++ b/libsigrokdecode4DSL/decoders/stepper_motor/pd.py
@@ -30,13 +30,13 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Embedded/industrial']
     channels = (
-        {'id': 'step', 'name': 'Step', 'desc': 'Step pulse'},
-        {'id': 'dir', 'name': 'Direction', 'desc': 'Direction select'},
+        {'id': 'step', 'name': 'Step', 'desc': 'Step pulse', 'idn':'dec_stepper_motor_chan_step'},
+        {'id': 'dir', 'name': 'Direction', 'desc': 'Direction select', 'idn':'dec_stepper_motor_chan_dir'},
     )
     options = (
         {'id': 'unit', 'desc': 'Unit', 'default': 'steps',
-         'values': ('steps', 'mm')},
-        {'id': 'steps_per_mm', 'desc': 'Steps per mm', 'default': 100.0},
+         'values': ('steps', 'mm'), 'idn':'dec_stepper_motor_opt_unit'},
+        {'id': 'steps_per_mm', 'desc': 'Steps per mm', 'default': 100.0, 'idn':'dec_stepper_motor_opt_steps_per_mm'},
     )
     annotations = (
         ('speed', 'Speed'),
diff --git a/libsigrokdecode4DSL/decoders/swd/pd.py b/libsigrokdecode4DSL/decoders/swd/pd.py
index 3f81e03d..ede7b09d 100644
--- a/libsigrokdecode4DSL/decoders/swd/pd.py
+++ b/libsigrokdecode4DSL/decoders/swd/pd.py
@@ -74,13 +74,13 @@ class Decoder(srd.Decoder):
     outputs = ['swd']
     tags = ['Debug/trace']
     channels = (
-        {'id': 'swclk', 'name': 'SWCLK', 'desc': 'Master clock'},
-        {'id': 'swdio', 'name': 'SWDIO', 'desc': 'Data input/output'},
+        {'id': 'swclk', 'name': 'SWCLK', 'desc': 'Master clock', 'idn':'dec_swd_chan_swclk'},
+        {'id': 'swdio', 'name': 'SWDIO', 'desc': 'Data input/output', 'idn':'dec_swd_chan_swdio'},
     )
     options = (
         {'id': 'strict_start',
          'desc': 'Wait for a line reset before starting to decode',
-         'default': 'no', 'values': ('yes', 'no')},
+         'default': 'no', 'values': ('yes', 'no'), 'idn':'dec_swd_opt_strict_start'},
     )
     annotations = (
         ('reset', 'RESET'),
diff --git a/libsigrokdecode4DSL/decoders/swim/pd.py b/libsigrokdecode4DSL/decoders/swim/pd.py
index 8c12ea7b..c6ce314e 100644
--- a/libsigrokdecode4DSL/decoders/swim/pd.py
+++ b/libsigrokdecode4DSL/decoders/swim/pd.py
@@ -35,10 +35,10 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Debug/trace']
     options = (
-        {'id': 'debug', 'desc': 'Debug', 'default': 'no', 'values': ('yes', 'no') },
+        {'id': 'debug', 'desc': 'Debug', 'default': 'no', 'values': ('yes', 'no') , 'idn':'dec_swim_opt_debug'},
     )
     channels = (
-        {'id': 'swim', 'name': 'SWIM', 'desc': 'SWIM data line'},
+        {'id': 'swim', 'name': 'SWIM', 'desc': 'SWIM data line', 'idn':'dec_swim_chan_swim'},
     )
     annotations = (
         ('bit', 'Bit'),
diff --git a/libsigrokdecode4DSL/decoders/t55xx/pd.py b/libsigrokdecode4DSL/decoders/t55xx/pd.py
index d345d318..d8720388 100644
--- a/libsigrokdecode4DSL/decoders/t55xx/pd.py
+++ b/libsigrokdecode4DSL/decoders/t55xx/pd.py
@@ -33,18 +33,18 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['IC', 'RFID']
     channels = (
-        {'id': 'data', 'name': 'Data', 'desc': 'Data line'},
+        {'id': 'data', 'name': 'Data', 'desc': 'Data line', 'idn':'dec_t55xx_chan_data'},
     )
     options = (
-        {'id': 'coilfreq', 'desc': 'Coil frequency', 'default': 125000},
-        {'id': 'start_gap', 'desc': 'Start gap min', 'default': 20},
-        {'id': 'w_gap', 'desc': 'Write gap min', 'default': 20},
-        {'id': 'w_one_min', 'desc': 'Write one min', 'default': 48},
-        {'id': 'w_one_max', 'desc': 'Write one max', 'default': 63},
-        {'id': 'w_zero_min', 'desc': 'Write zero min', 'default': 16},
-        {'id': 'w_zero_max', 'desc': 'Write zero max', 'default': 31},
+        {'id': 'coilfreq', 'desc': 'Coil frequency', 'default': 125000, 'idn':'dec_t55xx_opt_coilfreq'},
+        {'id': 'start_gap', 'desc': 'Start gap min', 'default': 20, 'idn':'dec_t55xx_opt_start_gap'},
+        {'id': 'w_gap', 'desc': 'Write gap min', 'default': 20, 'idn':'dec_t55xx_opt_w_gap'},
+        {'id': 'w_one_min', 'desc': 'Write one min', 'default': 48, 'idn':'dec_t55xx_opt_w_one_min'},
+        {'id': 'w_one_max', 'desc': 'Write one max', 'default': 63, 'idn':'dec_t55xx_opt_w_one_max'},
+        {'id': 'w_zero_min', 'desc': 'Write zero min', 'default': 16, 'idn':'dec_t55xx_opt_w_zero_min'},
+        {'id': 'w_zero_max', 'desc': 'Write zero max', 'default': 31, 'idn':'dec_t55xx_opt_w_zero_max'},
         {'id': 'em4100_decode', 'desc': 'EM4100 decode', 'default': 'on',
-            'values': ('on', 'off')},
+            'values': ('on', 'off'), 'idn':'dec_t55xx_opt_em4100_decode'},
     )
     annotations = (
         ('bit_value', 'Bit value'),
diff --git a/libsigrokdecode4DSL/decoders/tdm_audio/pd.py b/libsigrokdecode4DSL/decoders/tdm_audio/pd.py
index e805706f..3b18466c 100644
--- a/libsigrokdecode4DSL/decoders/tdm_audio/pd.py
+++ b/libsigrokdecode4DSL/decoders/tdm_audio/pd.py
@@ -32,14 +32,14 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Audio']
     channels = (
-        { 'id': 'clock', 'name': 'Bitclk', 'desc': 'Data bit clock' },
-        { 'id': 'frame', 'name': 'Framesync', 'desc': 'Frame sync' },
-        { 'id': 'data', 'name': 'Data', 'desc': 'Serial data' },
+        { 'id': 'clock', 'name': 'Bitclk', 'desc': 'Data bit clock', 'idn':'dec_tdm_audio_chan_clock' },
+        { 'id': 'frame', 'name': 'Framesync', 'desc': 'Frame sync', 'idn':'dec_tdm_audio_chan_frame' },
+        { 'id': 'data', 'name': 'Data', 'desc': 'Serial data', 'idn':'dec_tdm_audio_chan_data' },
     )
     options = (
-        {'id': 'bps', 'desc': 'Bits per sample', 'default': 16 },
-        {'id': 'channels', 'desc': 'Channels per frame', 'default': MAX_CHANNELS },
-        {'id': 'edge', 'desc': 'Clock edge to sample on', 'default': 'rising', 'values': ('rising', 'falling') }
+        {'id': 'bps', 'desc': 'Bits per sample', 'default': 16, 'idn':'dec_tdm_audio_opt_bps' },
+        {'id': 'channels', 'desc': 'Channels per frame', 'default': MAX_CHANNELS, 'idn':'dec_tdm_audio_opt_channels' },
+        {'id': 'edge', 'desc': 'Clock edge to sample on', 'default': 'rising', 'values': ('rising', 'falling') , 'idn':'dec_tdm_audio_opt_edge'}
     )
     annotations = tuple(('ch%d' % i, 'Ch%d' % i) for i in range(MAX_CHANNELS))
     annotation_rows = tuple(('ch%d-vals' % i, 'Ch%d' % i, (i,)) for i in range(MAX_CHANNELS))
diff --git a/libsigrokdecode4DSL/decoders/timing/pd.py b/libsigrokdecode4DSL/decoders/timing/pd.py
index 20ca2c4e..e32c13b4 100644
--- a/libsigrokdecode4DSL/decoders/timing/pd.py
+++ b/libsigrokdecode4DSL/decoders/timing/pd.py
@@ -56,7 +56,7 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Clock/timing', 'Util']
     channels = (
-        {'id': 'data', 'name': 'Data', 'desc': 'Data line'},
+        {'id': 'data', 'name': 'Data', 'desc': 'Data line', 'idn':'dec_timing_chan_data'},
     )
     annotations = (
         ('time', 'Time'),
@@ -69,9 +69,9 @@ class Decoder(srd.Decoder):
         ('delta', 'Delta', (2,)),
     )
     options = (
-        { 'id': 'avg_period', 'desc': 'Averaging period', 'default': 100 },
-        { 'id': 'edge', 'desc': 'Edges to check', 'default': 'any', 'values': ('any', 'rising', 'falling') },
-        { 'id': 'delta', 'desc': 'Show delta from last', 'default': 'no', 'values': ('yes', 'no') },
+        { 'id': 'avg_period', 'desc': 'Averaging period', 'default': 100 , 'idn':'dec_timing_opt_avg_period'},
+        { 'id': 'edge', 'desc': 'Edges to check', 'default': 'any', 'values': ('any', 'rising', 'falling') , 'idn':'dec_timing_opt_edge'},
+        { 'id': 'delta', 'desc': 'Show delta from last', 'default': 'no', 'values': ('yes', 'no') , 'idn':'dec_timing_opt_delta'},
     )
 
     def __init__(self):
diff --git a/libsigrokdecode4DSL/decoders/tlc5620/pd.py b/libsigrokdecode4DSL/decoders/tlc5620/pd.py
index eec040bc..6d7242cc 100644
--- a/libsigrokdecode4DSL/decoders/tlc5620/pd.py
+++ b/libsigrokdecode4DSL/decoders/tlc5620/pd.py
@@ -38,18 +38,18 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['IC', 'Analog/digital']
     channels = (
-        {'id': 'clk', 'name': 'CLK', 'desc': 'Serial interface clock'},
-        {'id': 'data', 'name': 'DATA', 'desc': 'Serial interface data'},
+        {'id': 'clk', 'name': 'CLK', 'desc': 'Serial interface clock', 'idn':'dec_tlc5620_chan_clk'},
+        {'id': 'data', 'name': 'DATA', 'desc': 'Serial interface data', 'idn':'dec_tlc5620_chan_data'},
     )
     optional_channels = (
-        {'id': 'load', 'name': 'LOAD', 'desc': 'Serial interface load control'},
-        {'id': 'ldac', 'name': 'LDAC', 'desc': 'Load DAC'},
+        {'id': 'load', 'name': 'LOAD', 'desc': 'Serial interface load control', 'idn':'dec_tlc5620_opt_chan_load'},
+        {'id': 'ldac', 'name': 'LDAC', 'desc': 'Load DAC', 'idn':'dec_tlc5620_opt_chan_ldac'},
     )
     options = (
-        {'id': 'vref_a', 'desc': 'Reference voltage DACA (V)', 'default': 3.3},
-        {'id': 'vref_b', 'desc': 'Reference voltage DACB (V)', 'default': 3.3},
-        {'id': 'vref_c', 'desc': 'Reference voltage DACC (V)', 'default': 3.3},
-        {'id': 'vref_d', 'desc': 'Reference voltage DACD (V)', 'default': 3.3},
+        {'id': 'vref_a', 'desc': 'Reference voltage DACA (V)', 'default': 3.3, 'idn':'dec_tlc5620_opt_vref_a'},
+        {'id': 'vref_b', 'desc': 'Reference voltage DACB (V)', 'default': 3.3, 'idn':'dec_tlc5620_opt_vref_b'},
+        {'id': 'vref_c', 'desc': 'Reference voltage DACC (V)', 'default': 3.3, 'idn':'dec_tlc5620_opt_vref_c'},
+        {'id': 'vref_d', 'desc': 'Reference voltage DACD (V)', 'default': 3.3, 'idn':'dec_tlc5620_opt_vref_d'},
     )
     annotations = (
         ('dac-select', 'DAC select'),
diff --git a/libsigrokdecode4DSL/decoders/usb_packet/pd.py b/libsigrokdecode4DSL/decoders/usb_packet/pd.py
index e262074e..59f839b3 100644
--- a/libsigrokdecode4DSL/decoders/usb_packet/pd.py
+++ b/libsigrokdecode4DSL/decoders/usb_packet/pd.py
@@ -184,7 +184,7 @@ class Decoder(srd.Decoder):
     tags = ['PC']
     options = (
         {'id': 'signalling', 'desc': 'Signalling',
-            'default': 'full-speed', 'values': ('full-speed', 'low-speed')},
+            'default': 'full-speed', 'values': ('full-speed', 'low-speed'), 'idn':'dec_usb_packet_opt_signalling'},
     )
     annotations = (
         ('sync-ok', 'SYNC'),
diff --git a/libsigrokdecode4DSL/decoders/usb_power_delivery/pd.py b/libsigrokdecode4DSL/decoders/usb_power_delivery/pd.py
index ed6aea91..6f263cb3 100644
--- a/libsigrokdecode4DSL/decoders/usb_power_delivery/pd.py
+++ b/libsigrokdecode4DSL/decoders/usb_power_delivery/pd.py
@@ -227,14 +227,14 @@ class Decoder(srd.Decoder):
     outputs = ['usb_pd']
     tags = ['PC']
     channels = (
-        {'id': 'cc1', 'name': 'CC1', 'desc': 'Configuration Channel 1'},
+        {'id': 'cc1', 'name': 'CC1', 'desc': 'Configuration Channel 1', 'idn':'dec_usb_power_delivery_chan_cc1'},
     )
     optional_channels = (
-        {'id': 'cc2', 'name': 'CC2', 'desc': 'Configuration Channel 2'},
+        {'id': 'cc2', 'name': 'CC2', 'desc': 'Configuration Channel 2', 'idn':'dec_usb_power_delivery_opt_chan_cc2'},
     )
     options = (
         {'id': 'fulltext', 'desc': 'Full text decoding of packets',
-         'default': 'no', 'values': ('yes', 'no')},
+         'default': 'no', 'values': ('yes', 'no'), 'idn':'dec_usb_power_delivery_opt_fulltext'},
     )
     annotations = (
         ('type', 'Packet Type'),
diff --git a/libsigrokdecode4DSL/decoders/usb_signalling/pd.py b/libsigrokdecode4DSL/decoders/usb_signalling/pd.py
index 60571f2d..933bee46 100644
--- a/libsigrokdecode4DSL/decoders/usb_signalling/pd.py
+++ b/libsigrokdecode4DSL/decoders/usb_signalling/pd.py
@@ -111,12 +111,12 @@ class Decoder(srd.Decoder):
     outputs = ['usb_signalling']
     tags = ['PC']
     channels = (
-        {'id': 'dp', 'name': 'D+', 'desc': 'USB D+ signal'},
-        {'id': 'dm', 'name': 'D-', 'desc': 'USB D- signal'},
+        {'id': 'dp', 'name': 'D+', 'desc': 'USB D+ signal', 'idn':'dec_usb_signalling_chan_dp'},
+        {'id': 'dm', 'name': 'D-', 'desc': 'USB D- signal', 'idn':'dec_usb_signalling_chan_dm'},
     )
     options = (
         {'id': 'signalling', 'desc': 'Signalling',
-            'default': 'automatic', 'values': ('automatic', 'full-speed', 'low-speed')},
+            'default': 'automatic', 'values': ('automatic', 'full-speed', 'low-speed'), 'idn':'dec_usb_signalling_opt_signalling'},
     )
     annotations = (
         ('sym-j', 'J symbol'),
diff --git a/libsigrokdecode4DSL/decoders/wiegand/pd.py b/libsigrokdecode4DSL/decoders/wiegand/pd.py
index d44852bd..e995506c 100644
--- a/libsigrokdecode4DSL/decoders/wiegand/pd.py
+++ b/libsigrokdecode4DSL/decoders/wiegand/pd.py
@@ -34,15 +34,14 @@ class Decoder(srd.Decoder):
     outputs = []
     tags = ['Embedded/industrial', 'RFID']
     channels = (
-        {'id': 'd0', 'name': 'D0', 'desc': 'Data 0 line'},
-        {'id': 'd1', 'name': 'D1', 'desc': 'Data 1 line'},
+        {'id': 'd0', 'name': 'D0', 'desc': 'Data 0 line', 'idn':'dec_wiegand_chan_d0'},
+        {'id': 'd1', 'name': 'D1', 'desc': 'Data 1 line', 'idn':'dec_wiegand_chan_d1'},
     )
     options = (
         {'id': 'active', 'desc': 'Data lines active level',
-         'default': 'low', 'values': ('low', 'high')},
+         'default': 'low', 'values': ('low', 'high'), 'idn':'dec_wiegand_opt_active'},
         {'id': 'bitwidth_ms', 'desc': 'Single bit width in milliseconds',
-         'default': 4, 'values': (1, 2, 4, 8, 16, 32)},
-       # {'id': 'bit-start', 'desc': 'Data bit start index', 'default': -1},
+         'default': 4, 'values': (1, 2, 4, 8, 16, 32), 'idn':'dec_wiegand_opt_bitwidth_ms'},
     )
     annotations = (
         ('bits', 'Bits'),
diff --git a/libsigrokdecode4DSL/decoders/xy2-100/pd.py b/libsigrokdecode4DSL/decoders/xy2-100/pd.py
index 47c4182c..7b93b268 100644
--- a/libsigrokdecode4DSL/decoders/xy2-100/pd.py
+++ b/libsigrokdecode4DSL/decoders/xy2-100/pd.py
@@ -36,12 +36,12 @@ class Decoder(srd.Decoder):
     tags = ['Embedded/industrial']
 
     channels = (
-        {'id': 'clk', 'name': 'CLK', 'desc': 'Clock'},
-        {'id': 'sync', 'name': 'SYNC', 'desc': 'Sync'},
-        {'id': 'data', 'name': 'DATA', 'desc': 'X, Y or Z axis data'},
+        {'id': 'clk', 'name': 'CLK', 'desc': 'Clock', 'idn':'dec_xy2-100_chan_clk'},
+        {'id': 'sync', 'name': 'SYNC', 'desc': 'Sync', 'idn':'dec_xy2-100_chan_sync'},
+        {'id': 'data', 'name': 'DATA', 'desc': 'X, Y or Z axis data', 'idn':'dec_xy2-100_chan_data'},
     )
     optional_channels = (
-        {'id': 'status', 'name': 'STAT', 'desc': 'X, Y or Z axis status'},
+        {'id': 'status', 'name': 'STAT', 'desc': 'X, Y or Z axis status', 'idn':'dec_xy2-100_opt_chan_status'},
     )
 
     annotations = (
diff --git a/libsigrokdecode4DSL/decoders/z80/pd.py b/libsigrokdecode4DSL/decoders/z80/pd.py
index 9af310e2..3c16d01b 100644
--- a/libsigrokdecode4DSL/decoders/z80/pd.py
+++ b/libsigrokdecode4DSL/decoders/z80/pd.py
@@ -79,17 +79,18 @@ class Decoder(srd.Decoder):
             'desc': 'Data bus line %d' % i
             } for i in range(8)
     ) + (
-        {'id': 'm1', 'name': '/M1', 'desc': 'Machine cycle 1'},
-        {'id': 'rd', 'name': '/RD', 'desc': 'Memory or I/O read'},
-        {'id': 'wr', 'name': '/WR', 'desc': 'Memory or I/O write'},
+        {'id': 'm1', 'name': '/M1', 'desc': 'Machine cycle 1', 'idn':'dec_z80_chan_m1'},
+        {'id': 'rd', 'name': '/RD', 'desc': 'Memory or I/O read', 'idn':'dec_z80_chan_rd'},
+        {'id': 'wr', 'name': '/WR', 'desc': 'Memory or I/O write', 'idn':'dec_z80_chan_wr'},
     )
     optional_channels = (
-        {'id': 'mreq', 'name': '/MREQ', 'desc': 'Memory request'},
-        {'id': 'iorq', 'name': '/IORQ', 'desc': 'I/O request'},
+        {'id': 'mreq', 'name': '/MREQ', 'desc': 'Memory request', 'idn':'dec_z80_opt_chan_mreq'},
+        {'id': 'iorq', 'name': '/IORQ', 'desc': 'I/O request', 'idn':'dec_z80_opt_chan_iorq'},
     ) + tuple({
         'id': 'a%d' % i,
         'name': 'A%d' % i,
-        'desc': 'Address bus line %d' % i
+        'desc': 'Address bus line %d' % i, 
+        'idn':'dec_z80_opt_chan_a%d' % i
         } for i in range(16)
     )
     annotations = (