diff --git a/libsigrokdecode4DSL/decoders/common/srdhelper/mod.py b/libsigrokdecode4DSL/decoders/common/srdhelper/mod.py
index b56cce6d..7c807599 100755
--- a/libsigrokdecode4DSL/decoders/common/srdhelper/mod.py
+++ b/libsigrokdecode4DSL/decoders/common/srdhelper/mod.py
@@ -21,6 +21,15 @@ from enum import Enum, IntEnum, unique
 from itertools import chain
 import re
 
+#bits to int
+def bits2int(bs):
+    n = len(bs)
+    v = 0
+    for i in range(n):
+        if bs[i] == 1 or bs[i] == '1':
+            v += 1 << (n - i - 1)
+    return v
+
 # Return the specified BCD number (max. 8 bits) as integer.
 def bcd2int(b):
     return (b & 0x0f) + ((b >> 4) * 10)
diff --git a/libsigrokdecode4DSL/decoders/wiegand/pd.py b/libsigrokdecode4DSL/decoders/wiegand/pd.py
index a93be109..87b6590e 100644
--- a/libsigrokdecode4DSL/decoders/wiegand/pd.py
+++ b/libsigrokdecode4DSL/decoders/wiegand/pd.py
@@ -18,6 +18,7 @@
 ##
 
 import sigrokdecode as srd
+from common.srdhelper import bits2int
 
 class SamplerateError(Exception):
     pass
@@ -41,6 +42,7 @@ class Decoder(srd.Decoder):
          'default': 'low', 'values': ('low', 'high')},
         {'id': 'bitwidth_ms', 'desc': 'Single bit width in milliseconds',
          'default': 4, 'values': (1, 2, 4, 8, 16, 32)},
+        {'id': 'bit-start', 'desc': 'Data bit start index', 'default': -1},
     )
     annotations = (
         ('bits', 'Bits'),
@@ -101,9 +103,26 @@ class Decoder(srd.Decoder):
         if state != self._state:
             ann = None
             if self._state == 'data':
-                accum_bits = ''.join(str(x) for x in self._bits)
-                ann = [1, ['%d bits %s' % (len(self._bits), accum_bits),
-                           '%d bits' % len(self._bits)]]
+               #accum_bits = ''.join(str(x) for x in self._bits)
+                bstart = int(self.options['bit-start'])
+                bits = self._bits
+                blen = len(self._bits)
+
+                # get data block
+                if bstart != -1: 
+                    bits = []
+                    while bstart + 4 <= blen:
+                        bits.append(self._bits[bstart+0]);
+                        bits.append(self._bits[bstart+1]);
+                        bits.append(self._bits[bstart+2]);
+                        bits.append(self._bits[bstart+3]);
+                        bstart += 4
+
+                blen = len(bits)
+                s1 = '%d bits {$}' % blen
+                s2 = '%d bits' % blen
+                s3 = '@%02X' % (bits2int(bits))
+                ann = [1, [s1, s2, s3]]
             elif self._state == 'invalid':
                 ann = [1, [self._state]]
             if ann: